Clock Forwarding

clock forwarding
So Kanidaten wie ResetxR ..GND

C1 => not Clk125MxC, -- 1-bit clock Input
 not_ticks  Feedback .
Bob Elkind
Bild dazu:
http://forums.xilinx.com/t5/Spartan-Family-FPGAs/driving-clock-on-IO/m-p/212829#M15751
http://forums.xilinx.com/t5/Spartan-Family-FPGAs/driving-clock-on-IO/m-p/212829#M15751

Oder direkt da im x Forum schreiben & suchen.
Viel Erfolg.
Gruss Holger.
Probleme mit Artix:
http://www.mikrocontroller.net/topic/316534#new
/*http://pastebin.com/ZbZ6vnZc*/

==== DDR SDRAM (SD) ====   (I/O Bank 3, VCCO=2.5V)
NET "ddr_dm<0>"       LOC = "J2" | IOSTANDARD = SSTL2_I ;
NET "ddr_dm<1>"       LOC = "J1" | IOSTANDARD = SSTL2_I ;
NET "ddr_dqs<0>"      LOC = "L6" | IOSTANDARD = SSTL2_I ;
NET "ddr_dqs<1>"      LOC = "G3" | IOSTANDARD = SSTL2_I ;
NET "ddr_cs_n"        LOC = "K4" | IOSTANDARD = SSTL2_I ;
NET "ddr_cke"         LOC = "K3" | IOSTANDARD = SSTL2_I ;
NET "ddr_ras_n"       LOC = "C1" | IOSTANDARD = SSTL2_I ;
NET "ddr_cas_n"       LOC = "C2" | IOSTANDARD = SSTL2_I ;
NET "ddr_we_n"        LOC = "D1" | IOSTANDARD = SSTL2_I ;

NET "ddr_clk"         LOC = "J5" | IOSTANDARD = SSTL2_I ;
NET "ddr_clk_n"       LOC = "J4" | IOSTANDARD = SSTL2_I ;
NET "ddr_a<0>"        LOC = "T1" | IOSTANDARD = SSTL2_I ;
NET "ddr_a<1>"        LOC = "R3" | IOSTANDARD = SSTL2_I ;
NET "ddr_a<2>"        LOC = "R2" | IOSTANDARD = SSTL2_I ;


# ==== Clock inputs (CLK) ====
NET "clk" LOC = "C9" | IOSTANDARD = LVCMOS33 ;
NET "clk" PERIOD = 20 HIGH 50%;

# ==== UART ====
NET "uart_rxd" LOC = "R7"  | IOSTANDARD = LVTTL ;
NET "uart_txd" LOC = "M14" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = SLOW ;

NET "clk_IBUFG"               TNM="SYS_CLK";
NET "*/ctrl0/write_clk"       TNM="WRITE_CLK";
NET "*/ctrl0/write_clk90"     TNM="WRITE_CLK";
NET "*/ctrl0/read_clk"        TNM="READ_CLK";

TIMESPEC "TS_SYS_DDRREAD"=FROM "SYS_CLK" TO "WRITE_CLK" TIG;
TIMESPEC "TS_DDRREAD_SYS"=FROM "WRITE_CLK" TO "SYS_CLK" TIG;

TIMESPEC "TS_SYS_DDRWRITE"=FROM "SYS_CLK" TO "READ_CLK" TIG;
TIMESPEC "TS_DDRWRITE_SYS"=FROM "READ_CLK" TO "SYS_CLK" TIG;

TIMESPEC "TS_DDRREAD_DDRWRITE"=FROM "READ_CLK" TO "WRITE_CLK" TIG;
TIMESPEC "TS_DDRWRITE_DDRREAD"=FROM "WRITE_CLK" TO "READ_CLK" TIG;

#