module FindMaxVal_pipelined (
    input clk_i
    , input rst_i

    , input [31:0] elem_bi [15:0]

    , output logic [31:0] max_elem_bo
    , output logic [3:0] max_index_bo
);

// stage 0
logic [31:0] max_elem_stage0  [7:0];
logic [31:0] max_index_stage0 [7:0];
always @(posedge clk_i)
    begin
    for(integer i=0; i<8; i++)
        begin
        if (elem_bi[(i<<1)] > elem_bi[(i<<1)+1])
            begin
            max_elem_stage0[i] <= elem_bi[(i<<1)];
            max_index_stage0[i] <= i<<1;
            end
        else
            begin
            max_elem_stage0[i] <= elem_bi[(i<<1)+1];
            max_index_stage0[i] <= (i<<1)+1;
            end
        end
    end

// stage 1
…

// stage 2
…

// stage 3
always @(posedge clk_i)
    begin
    if (max_elem_stage2[0] > max_elem_stage2[1])
        begin
        max_elem_bo <= max_elem_stage2[0];
        max_index_bo <= max_index_stage2[0];
        end
    else
        begin
        max_elem_bo <= max_elem_stage2[1];
        max_index_bo <= max_index_stage2[1];
        end
    end

endmodule