VHDL - TestBench Generator

<?php
//VHDL testbench autogenerator
// Developped by William Romiguieres

$regexPortDetect = '/port\([0-9a-zA-Z :_; \r \t \n\(]+/m';;
$regexLibrary = '/Library ([a-zA-Z0-9]+)/m';
$regexEntityName = '/entity ([a-zA-Z0-9_]+)/m';
$regexEachPort = '/port\(';

session_start();
$content = htmlspecialchars($_POST['code_input']);

//fix issue of multiply detection
$count = null;
$content = preg_replace('/([0-9]+)[ ]+downto[ ]+([0-9 ]+)\\)/m', '$1 downto $2', $content, -1, $count);

preg_match_all($regexPortDetect, $content, $matchPort, PREG_SET_ORDER, 0);
$firstPortDeclaration = $matchPort[0][0].');';

$firstPortDeclaration = str_replace("\n","",$firstPortDeclaration);
$firstPortDeclaration = str_replace("\r","",$firstPortDeclaration);
$firstPortDeclaration = str_replace("\t","",$firstPortDeclaration);
$firstPortDeclaration = trim($firstPortDeclaration);

$nb_io = substr_count($firstPortDeclaration, ';');

for ($i=0; $i < $nb_io; $i++) {
    $regexEachPort.='(([\w ]+)[: ]+(out|in|buffer)([ a-zA-Z0-9_\(\)]+));';
}
$regexEachPort = substr($regexEachPort, 0, -1);
$regexEachPort.='/m';

preg_match_all($regexLibrary, $content, $matchLib, PREG_SET_ORDER, 0);
preg_match_all($regexEntityName, $content, $matchEntityName, PREG_SET_ORDER, 0);
preg_match($regexEachPort, $firstPortDeclaration, $matchEachPort, PREG_OFFSET_CAPTURE, 0);

$library = $matchLib[0][1];
$entityName = $matchEntityName[0][1];

/* Extact top ports and store them in an array */
/*Construct port list*/

$portList = array();
$cpt_port = 0;

for ($i=1; $i <= 4*$nb_io; $i = $i+4) {
   $cpt_port++;
   $dataPortExtracted = explode(':', trim($matchEachPort[$i][0]));
   $dataPortExtracted2 = explode(' ',trim($dataPortExtracted[1]));

   $dataPortExtracted2 = cleanTab($dataPortExtracted2);
   $portList[$cpt_port- 1]['name'] = $dataPortExtracted[0];
   $portList[$cpt_port - 1]['direction'] = $dataPortExtracted2[0];

   if(strstr($dataPortExtracted2[1], 'std_logic_vector')){
      $portList[$cpt_port - 1]['type'] = $dataPortExtracted2[1].' '.$dataPortExtracted2[2].' '.$dataPortExtracted2[3];
   }else{
      $portList[$cpt_port - 1]['type'] = $dataPortExtracted2[1];
   }

   if(substr($portList[$cpt_port - 1]['type'], -1, 1) != ')'){
      $portList[$cpt_port - 1]['type'].=')';
   }


}
$cpt = 0;

$output = "-------------------------------------------------------------\n";
$output .= "-- Auto-generated Test Bench\n";
$output.="-- A tool by William Romiguieres\n";
$output.="-- Thanks you for using my tool!\n";
$output.="---------------------------------------------------------------";
$output.="\n\n";
$output.="--Extacted infos from your file:\n";
$output.="--> Used Library: ".$library."\n";
$output.="--> Entity name: ".$entityName."\n";
$output.="--> Number of IO detected: ".$nb_io."\n\n\n";
$output.="Library ".$library."\n\n";
$output.="entity tb_".$entityName." is\n";
$output.="end tb_".$entityName.";\n\n";
$output.="architecture v1 of tb_".$entityName." is\n\n";
$output.="-- component declaration for ".$entityName."\n";
$output.="component ".$entityName."\n port(\n";
foreach ($portList as $key => $value) {

   if(!strstr($value['type'], 'std_logic_vector') && $cpt != count($portList) - 1 && substr($value['type'], -1) != ';'){
      $value['type'] = substr_replace($value['type'], ';', -1);
   }
   $output.= $value['name']." : ".$value['direction']." ".$value['type']."\n";
   $cpt++;
}
$cpt = 0;
$output.=");\n\n";
$output.="-- Signal Generation\n";
foreach ($portList as $key => $value) {

   if(!strstr($value['type'], 'std_logic_vector') && substr($value['type'], -1) != ';'){
      $value['type'] = substr_replace($value['type'], ' ', -1);
   }


   $output.= "signal int_".$value['name']." : ".$value['type'];

   if($value['direction'] == 'in'){
      if(strstr($value['type'], 'std_logic_vector')){
         $output.=" := (others => '0')";
      }else{
         $output.=" := '0'";
      }
   }
   $output.=";\n";
   $cpt++;
}

$output.="\n--Clock signal definition\n";
$output.="constant clk_period : time  := 1us;\n\n";

$output.="begin\n";
$cpt = 0;
$output.="UUT_".$entityName." : ".$entityName." Port map(\n";
foreach ($portList as $key => $value) {
   $output.="\t".$value['name']." => int_".$value['name'];

   if($cpt != count($portList) - 1){
      $output.=",\n";
   }else{
      $output.="\n";
   }
   $cpt++;
}
$output.=");\n";

$output.="end v1;\n";

$_SESSION['result'] = $output;

header('location:result.php');

function debug($string){
   echo '<pre>';
   print_r($string);
   echo '</pre>';
}

function cleanTab($array){
   foreach ($array as $k => $v) {
      if (checkEmptyStr($v)){
         unset($array[$k]);
         $array = array_slice($array,0);
      }

   }
   return $array;
}
function checkEmptyStr($string){
   if(strlen(str_replace(' ', '',$string)) == 0){
      return true;
   }else{
      return false;
   }
}