ac lab4 pb5

module cmp2b (
    input [1:0] a, b,
    output lt, eq, gt
);
    assign lt = (a < b) ? 1'b1 : 1'b0;
    assign eq = (a == b) ? 1'b1 : 1'b0;
    assign gt = (a > b) ? 1'b1 : 1'b0;
endmodule

module cmp4b (
    input [3:0] a, b,
    output lt, eq, gt
);
    wire lt1, eq1, gt1;
        wire lt2, eq2, gt2;

        cmp2b u1 (.a(a[3:2]), .b(b[3:2]), .lt(lt1), .eq(eq1), .gt(gt1));
        cmp2b u2 (.a(a[1:0]), .b(b[1:0]), .lt(lt2), .eq(eq2), .gt(gt2));
        assign lt = (lt1 | (eq1 & lt2));
        assign eq = (eq1 & eq2);
        assign gt = (gt1 | (eq1 & gt2) | (eq2 & gt2));

endmodule

module cmp4b_tb;
        reg[3:0] a, b;
        wire lt, eq, gt;
        cmp4b cmp4b_i (
        .a(a),
        .b(b),
        .lt(lt),
        .eq(eq),
        .gt(gt)
        );
    integer i, j;
        initial begin
        $display("a\tb\tlt\teq\tgt");
        $monitor("%d\t%d\t%b\t%b\t%b", a, b, lt, eq, gt);
        for (i = 0; i < 16; i = i + 1) begin
            for (j = 0; j < 16; j = j + 1) begin
                a = i;
                b = j;
                #10;
            end
        end
        end

endmodule