Makefile template done right

# from https://tech.davis-hansson.com/p/make/
# use bash as the default shell
SHELL := bash
# ensures each Make recipe is ran as one single shell session, rather than one new shell per line
.ONESHELL:
# use bash strict mode. http://redsymbol.net/articles/unofficial-bash-strict-mode/
.SHELLFLAGS := -eu -o pipefail -c
# remove target files when Make file failed
.DELETE_ON_ERROR:
# warning when referring the undefined variables
MAKEFLAGS += --warn-undefined-variables
# disable the builtin rules. Only do what I tell you!
MAKEFLAGS += --no-builtin-rules

# replace tabs
ifeq ($(origin .RECIPEPREFIX), undefined)
    $(error This Make does not support .RECIPEPREFIX. Please use GNU Make 4.0 or later)
endif
.RECIPEPREFIX = >

CC       := gcc
CFLAGS   := -Wall -Werror
ifeq ($(mode), debug)
CFLAGS += -g
endif
OS       := $(shell uname -s)
LIBS     :=
ifeq ($(OS), Linux)
LIBS += -pthread
endif

SRCS     := all_src_files.c
OBJS     := ${SRCS:c=o}
PROGS    := ${SRCS:.c=}

.PHONY: all clean
# Default - top level rule is what gets ran when you run just `make`
all: ${PROGS}

${PROGS} : % : %.o Makefile
> ${CC} $< -o $@ ${LIBS}

%.o: %.c Makefile
> ${CC} ${CFLAGS} -c $<

# Clean up
clean:
> rm -f ${OBJS}
> rm -f ${PROGS}