`timescale 1ns / 1ps

module picturereader(
  input wire clk,
  input wire rd_en,
  input wire rd_en2,
  input wire rd_en3,
  input wire rd_enp1win,
  input wire rd_enp2win,
  output wire [3:0] r,
  output wire [3:0] g,
  output wire [3:0] b,

  output wire [3:0] p1r,
  output wire [3:0] p1g,
  output wire [3:0] p1b,

  output wire [3:0] p2r,
  output wire [3:0] p2g,
  output wire [3:0] p2b,

  output wire [3:0] p1wr,
  output wire [3:0] p1wg,
  output wire [3:0] p1wb,

  output wire [3:0] p2wr,
  output wire [3:0] p2wg,
  output wire [3:0] p2wb
);

  // Memory addresses for different memory blocks
  reg [14:0] address = 15'd0;
  reg [15:0] p1address = 16'd0;
  reg [15:0] p2address = 16'd0;
  reg [18:0] p1waddress = 19'd0;
  reg [18:0] p2waddress = 19'd0;

  // Pixel data from different memory blocks
  wire [11:0] pixel;
  wire [11:0] p1pixel;
  wire [11:0] p2pixel;
  wire [11:0] p1wpixel;

  // Parameterized sizes for different memory blocks
  parameter PIC_SIZE = 15'd18400;
  parameter p1PIC_SIZE = 16'd62500;
  parameter p2PIC_SIZE = 16'd62500;
  parameter p1wPIC_SIZE = 19'd360000;
  parameter p2wPIC_SIZE = 19'd360000;

  // Extract RGB components from pixel data
  assign r = pixel[11:8];
  assign g = pixel[7:4];
  assign b = pixel[3:0];

  assign p1r = p1pixel[11:8];
  assign p1g = p1pixel[7:4];
  assign p1b = p1pixel[3:0];

  assign p2r = p2pixel[11:8];
  assign p2g = p2pixel[7:4];
  assign p2b = p2pixel[3:0];

  assign p1wr = p1wpixel[11:8];
  assign p1wg = p1wpixel[7:4];
  assign p1wb = p1wpixel[3:0];

  assign p2wr = p2wpixel[11:8];
  assign p2wg = p2wpixel[7:4];
  assign p2wb = p2wpixel[3:0];

  // Logic for address incrementing
  always @(posedge clk) begin
    if (address == (PIC_SIZE - 1))
      address <= 15'd0;
    else if (rd_en) begin
      address <= address + 1;
    end

    if (p1address == (p1PIC_SIZE - 1))
      p1address <= 16'd0;
    else if (rd_en2) begin
      p1address <= p1address + 1;
    end

    if (p2address == (p2PIC_SIZE - 1))
      p2address <= 16'd0;
    else if (rd_en3) begin
      p2address <= p2address + 1;
    end

    if (p1waddress == (p1wPIC_SIZE - 1))
      p1waddress <= 19'd0;
    else if (rd_enp1win) begin
      p1waddress <= p1waddress + 1;
    end

    if (p2waddress == (p2wPIC_SIZE - 1))
      p2waddress <= 19'd0;
    else if (rd_enp2win) begin
      p2waddress <= p2waddress + 1;
    end
  end

  // Instantiate memory modules for different blocks
  picture_1 picture (.clka(clk), .addra(address), .douta(pixel));
  blk_mem_gen_0 p1 (.clka(clk), .addra(p1address), .douta(p1pixel));
  blk_mem_gen_1 p2 (.clka(clk), .addra(p2address), .douta(p2pixel));
  p1win p1win (.clka(clk), .addra(p1waddress), .douta(p1wpixel));
  blk_mem_gen_2 p2win (.clka(clk), .addra(p2waddress), .douta(p2wpixel));

endmodule