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Xisabla
Oct 11th, 2021
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M68000 Assembler 32.59 KB | None | 0 0
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  1. ;*******************************************************************************
  2. ;                                                                              *
  3. ;    Microchip licenses this software to you solely for use with Microchip     *
  4. ;    products. The software is owned by Microchip and/or its licensors, and is *
  5. ;    protected under applicable copyright laws.  All rights reserved.          *
  6. ;                                                                              *
  7. ;    This software and any accompanying information is for suggestion only.    *
  8. ;    It shall not be deemed to modify Microchip?s standard warranty for its    *
  9. ;    products.  It is your responsibility to ensure that this software meets   *
  10. ;    your requirements.                                                        *
  11. ;                                                                              *
  12. ;    SOFTWARE IS PROVIDED "AS IS".  MICROCHIP AND ITS LICENSORS EXPRESSLY      *
  13. ;    DISCLAIM ANY WARRANTY OF ANY KIND, WHETHER EXPRESS OR IMPLIED, INCLUDING  *
  14. ;    BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS    *
  15. ;    FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. IN NO EVENT SHALL          *
  16. ;    MICROCHIP OR ITS LICENSORS BE LIABLE FOR ANY INCIDENTAL, SPECIAL,         *
  17. ;    INDIRECT OR CONSEQUENTIAL DAMAGES, LOST PROFITS OR LOST DATA, HARM TO     *
  18. ;    YOUR EQUIPMENT, COST OF PROCUREMENT OF SUBSTITUTE GOODS, TECHNOLOGY OR    *
  19. ;    SERVICES, ANY CLAIMS BY THIRD PARTIES (INCLUDING BUT NOT LIMITED TO ANY   *
  20. ;    DEFENSE THEREOF), ANY CLAIMS FOR INDEMNITY OR CONTRIBUTION, OR OTHER      *
  21. ;    SIMILAR COSTS.                                                            *
  22. ;                                                                              *
  23. ;    To the fullest extend allowed by law, Microchip and its licensors         *
  24. ;    liability shall not exceed the amount of fee, if any, that you have paid  *
  25. ;    directly to Microchip to use this software.                               *
  26. ;                                                                              *
  27. ;    MICROCHIP PROVIDES THIS SOFTWARE CONDITIONALLY UPON YOUR ACCEPTANCE OF    *
  28. ;    THESE TERMS.                                                              *
  29. ;                                                                              *
  30. ;*******************************************************************************
  31. ;                                                                              *
  32. ;    Filename: main.asm                                                        *
  33. ;    Date: 13/01/2020                                                          *
  34. ;    File Version: 1.0.0                                                       *
  35. ;    Author: MIQUET Gautier                                                    *
  36. ;    Company: PROJET ELEC ISEN - Equipe 1                                      *
  37. ;    Description: Main source file of the electronic projet (week 2)           *
  38. ;                                                                              *
  39. ;*******************************************************************************
  40. ;                                                                              *
  41. ;    Notes: In the MPLAB X Help, refer to the MPASM Assembler documentation    *
  42. ;    for information on assembly instructions.                                 *
  43. ;                                                                              *
  44. ;*******************************************************************************
  45. ;                                                                              *
  46. ;    Known Issues: This template is designed for relocatable code.  As such,   *
  47. ;    build errors such as "Directive only allowed when generating an object    *
  48. ;    file" will result when the 'Build in Absolute Mode' checkbox is selected  *
  49. ;    in the project properties.  Designing code in absolute mode is            *
  50. ;    antiquated - use relocatable mode.                                        *
  51. ;                                                                              *
  52. ;*******************************************************************************
  53. ;                                                                              *
  54. ;    Revision History:                                                         *
  55. ;                                                                              *
  56. ;*******************************************************************************
  57.  
  58.  
  59.  
  60. ;*******************************************************************************
  61. ; Processor Inclusion
  62. ;
  63. ; TODO Step #1 Open the task list under Window > Tasks.  Include your
  64. ; device .inc file - e.g. #include <device_name>.inc.  Available
  65. ; include files are in C:\Program Files\Microchip\MPLABX\mpasmx
  66. ; assuming the default installation path for MPLAB X.  You may manually find
  67. ; the appropriate include file for your device here and include it, or
  68. ; simply copy the include generated by the configuration bits
  69. ; generator (see Step #2).
  70. ;
  71. ;*******************************************************************************
  72.  
  73. #include "p18f25k40.inc"
  74.  
  75. ;*******************************************************************************
  76. ;
  77. ; TODO Step #2 - Configuration Word Setup
  78. ;
  79. ; The 'CONFIG' directive is used to embed the configuration word within the
  80. ; .asm file. MPLAB X requires users to embed their configuration words
  81. ; into source code.  See the device datasheet for additional information
  82. ; on configuration word settings.  Device configuration bits descriptions
  83. ; are in C:\Program Files\Microchip\MPLABX\mpasmx\P<device_name>.inc
  84. ; (may change depending on your MPLAB X installation directory).
  85. ;
  86. ; MPLAB X has a feature which generates configuration bits source code.  Go to
  87. ; Window > PIC Memory Views > Configuration Bits.  Configure each field as
  88. ; needed and select 'Generate Source Code to Output'.  The resulting code which
  89. ; appears in the 'Output Window' > 'Config Bits Source' tab may be copied
  90. ; below.
  91. ;
  92. ;*******************************************************************************
  93.  
  94. ; CONFIG1L
  95.   CONFIG  FEXTOSC = OFF         ; External Oscillator mode Selection bits (Oscillator not enabled)
  96.   CONFIG  RSTOSC = HFINTOSC_64MHZ; Power-up default value for COSC bits (HFINTOSC with HFFRQ = 64 MHz and CDIV = 1:1)
  97.  
  98. ; CONFIG1H
  99.   CONFIG  CLKOUTEN = OFF        ; Clock Out Enable bit (CLKOUT function is disabled)
  100.   CONFIG  CSWEN = ON            ; Clock Switch Enable bit (Writing to NOSC and NDIV is allowed)
  101.   CONFIG  FCMEN = ON            ; Fail-Safe Clock Monitor Enable bit (Fail-Safe Clock Monitor enabled)
  102.  
  103. ; CONFIG2L
  104.   CONFIG  MCLRE = EXTMCLR       ; Master Clear Enable bit (If LVP = 0, MCLR pin is MCLR; If LVP = 1, RE3 pin function is MCLR )
  105.   CONFIG  PWRTE = OFF           ; Power-up Timer Enable bit (Power up timer disabled)
  106.   CONFIG  LPBOREN = OFF         ; Low-power BOR enable bit (ULPBOR disabled)
  107.   CONFIG  BOREN = SBORDIS       ; Brown-out Reset Enable bits (Brown-out Reset enabled , SBOREN bit is ignored)
  108.  
  109. ; CONFIG2H
  110.   CONFIG  BORV = VBOR_2P45      ; Brown Out Reset Voltage selection bits (Brown-out Reset Voltage (VBOR) set to 2.45V)
  111.   CONFIG  ZCD = OFF             ; ZCD Disable bit (ZCD disabled. ZCD can be enabled by setting the ZCDSEN bit of ZCDCON)
  112.   CONFIG  PPS1WAY = ON          ; PPSLOCK bit One-Way Set Enable bit (PPSLOCK bit can be cleared and set only once; PPS registers remain locked after one clear/set cycle)
  113.   CONFIG  STVREN = ON           ; Stack Full/Underflow Reset Enable bit (Stack full/underflow will cause Reset)
  114.   CONFIG  DEBUG = OFF           ; Debugger Enable bit (Background debugger disabled)
  115.   CONFIG  XINST = OFF           ; Extended Instruction Set Enable bit (Extended Instruction Set and Indexed Addressing Mode disabled)
  116.  
  117. ; CONFIG3L
  118.   CONFIG  WDTCPS = WDTCPS_31    ; WDT Period Select bits (Divider ratio 1:65536; software control of WDTPS)
  119.   CONFIG  WDTE = OFF            ; WDT operating mode (WDT Disabled)
  120.  
  121. ; CONFIG3H
  122.   CONFIG  WDTCWS = WDTCWS_7     ; WDT Window Select bits (window always open (100%); software control; keyed access not required)
  123.   CONFIG  WDTCCS = SC           ; WDT input clock selector (Software Control)
  124.  
  125. ; CONFIG4L
  126.   CONFIG  WRT0 = OFF            ; Write Protection Block 0 (Block 0 (000800-001FFFh) not write-protected)
  127.   CONFIG  WRT1 = OFF            ; Write Protection Block 1 (Block 1 (002000-003FFFh) not write-protected)
  128.   CONFIG  WRT2 = OFF            ; Write Protection Block 2 (Block 2 (004000-005FFFh) not write-protected)
  129.   CONFIG  WRT3 = OFF            ; Write Protection Block 3 (Block 3 (006000-007FFFh) not write-protected)
  130.  
  131. ; CONFIG4H
  132.   CONFIG  WRTC = OFF            ; Configuration Register Write Protection bit (Configuration registers (300000-30000Bh) not write-protected)
  133.   CONFIG  WRTB = OFF            ; Boot Block Write Protection bit (Boot Block (000000-0007FFh) not write-protected)
  134.   CONFIG  WRTD = OFF            ; Data EEPROM Write Protection bit (Data EEPROM not write-protected)
  135.   CONFIG  SCANE = ON            ; Scanner Enable bit (Scanner module is available for use, SCANMD bit can control the module)
  136.   CONFIG  LVP = OFF             ; Low Voltage Programming Enable bit (HV on MCLR/VPP must be used for programming)
  137.  
  138. ; CONFIG5L
  139.   CONFIG  CP = OFF              ; UserNVM Program Memory Code Protection bit (UserNVM code protection disabled)
  140.   CONFIG  CPD = OFF             ; DataNVM Memory Code Protection bit (DataNVM code protection disabled)
  141.  
  142. ; CONFIG5H
  143.  
  144. ; CONFIG6L
  145.   CONFIG  EBTR0 = OFF           ; Table Read Protection Block 0 (Block 0 (000800-001FFFh) not protected from table reads executed in other blocks)
  146.   CONFIG  EBTR1 = OFF           ; Table Read Protection Block 1 (Block 1 (002000-003FFFh) not protected from table reads executed in other blocks)
  147.   CONFIG  EBTR2 = OFF           ; Table Read Protection Block 2 (Block 2 (004000-005FFFh) not protected from table reads executed in other blocks)
  148.   CONFIG  EBTR3 = OFF           ; Table Read Protection Block 3 (Block 3 (006000-007FFFh) not protected from table reads executed in other blocks)
  149.  
  150. ; CONFIG6H
  151.   CONFIG  EBTRB = OFF           ; Boot Block Table Read Protection bit (Boot Block (000000-0007FFh) not protected from table reads executed in other blocks)
  152.  
  153.  
  154. ;*******************************************************************************
  155. ;
  156. ; TODO Step #3 - Variable Definitions
  157. ;
  158. ; Refer to datasheet for available data memory (RAM) organization assuming
  159. ; relocatible code organization (which is an option in project
  160. ; properties > mpasm (Global Options)).  Absolute mode generally should
  161. ; be used sparingly.
  162. ;
  163. ; Example of using GPR Uninitialized Data
  164. ;
  165. ;   GPR_VAR        UDATA
  166. ;   MYVAR1         RES        1      ; User variable linker places
  167. ;   MYVAR2         RES        1      ; User variable linker places
  168. ;   MYVAR3         RES        1      ; User variable linker places
  169. ;
  170. ;   ; Example of using Access Uninitialized Data Section (when available)
  171. ;   ; The variables for the context saving in the device datasheet may need
  172. ;   ; memory reserved here.
  173. ;   INT_VAR        UDATA_ACS
  174. ;   W_TEMP         RES        1      ; w register for context saving (ACCESS)
  175. ;   STATUS_TEMP    RES        1      ; status used for context saving
  176. ;   BSR_TEMP       RES        1      ; bank select used for ISR context saving
  177. ;
  178. ;*******************************************************************************
  179.  
  180. INT_VAR UDATA_ACS
  181.  
  182. ; TEMPO ITERATORS
  183. i RES 1
  184. j RES 1
  185. k RES 1
  186.  
  187. ; MATRIX SIZE
  188. MATRIX_WIDTH RES 1
  189. MATRIX_HEIGHT RES 1
  190.  
  191. ; MATRIX ITERATOR
  192. MATRIX_ITR RES 1
  193.  
  194. ; VECOTR POINTER
  195. VEC_HIGH RES 1
  196. VEC_LOW RES 1
  197.  
  198. ; VECTOR SIZE
  199. VEC_SIZE RES 1
  200.  
  201. ; TILE LED STREAM ITERATOR
  202. TILE_ITR RES 1
  203.  
  204. ; FILL VECTOR ITERATOR
  205. FILL_ITR RES 1
  206.  
  207. ; COLUMN LEVEL TO STREAM
  208. COL_LEVEL RES 1
  209.  
  210. ; FREQUENCIES VALUES [0, 8]
  211. FREQ_LOW RES 1
  212. FREQ_MED_LOW RES 1
  213. FREQ_MED_HIGH RES 1
  214. FREC_HIGH RES 1
  215.  
  216. FREQ_LEVEL RES 1
  217.  
  218. TEMP RES 1
  219.  
  220. ;*******************************************************************************
  221. ; Reset Vector
  222. ;*******************************************************************************
  223.  
  224. RES_VECT  CODE    0x0000            ; processor reset vector
  225.     GOTO    RUN                   ; go to beginning of program
  226.  
  227. ;*******************************************************************************
  228. ; TODO Step #4 - Interrupt Service Routines
  229. ;
  230. ; There are a few different ways to structure interrupt routines in the 8
  231. ; bit device families.  On PIC18's the high priority and low priority
  232. ; interrupts are located at 0x0008 and 0x0018, respectively.  On PIC16's and
  233. ; lower the interrupt is at 0x0004.  Between device families there is subtle
  234. ; variation in the both the hardware supporting the ISR (for restoring
  235. ; interrupt context) as well as the software used to restore the context
  236. ; (without corrupting the STATUS bits).
  237. ;
  238. ; General formats are shown below in relocatible format.
  239. ;
  240. ;------------------------------PIC16's and below--------------------------------
  241. ;
  242. ; ISR       CODE    0x0004           ; interrupt vector location
  243. ;
  244. ;     <Search the device datasheet for 'context' and copy interrupt
  245. ;     context saving code here.  Older devices need context saving code,
  246. ;     but newer devices like the 16F#### don't need context saving code.>
  247. ;
  248. ;     RETFIE
  249. ;
  250. ;----------------------------------PIC18's--------------------------------------
  251. ;
  252. ; ISRHV     CODE    0x0008
  253. ;     GOTO    HIGH_ISR
  254. ; ISRLV     CODE    0x0018
  255. ;     GOTO    LOW_ISR
  256. ;
  257. ; ISRH      CODE                     ; let linker place high ISR routine
  258. ; HIGH_ISR
  259. ;     <Insert High Priority ISR Here - no SW context saving>
  260. ;     RETFIE  FAST
  261. ;
  262. ; ISRL      CODE                     ; let linker place low ISR routine
  263. ; LOW_ISR
  264. ;       <Search the device datasheet for 'context' and copy interrupt
  265. ;       context saving code here>
  266. ;     RETFIE
  267. ;
  268. ;*******************************************************************************
  269.  
  270. ; TODO INSERT ISR HERE
  271.  
  272. ;*******************************************************************************
  273. ; MAIN PROGRAM
  274. ;*******************************************************************************
  275.  
  276. MAIN_PROG CODE                      ; let linker place main program
  277.  
  278. ;*******************************************************************************
  279. ; MAIN VALUES INIT
  280. ;*******************************************************************************
  281.  
  282. INIT
  283.     ; INPUTS/OUTPUTS
  284.     MOVLW b'00011111'
  285.     MOVWF TRISA         ; Set A INPUT for ADC
  286.     MOVLW 0x00
  287.     MOVWF TRISB         ; Set B as OUTPUT
  288.     MOVLW 0x00
  289.     MOVWF TRISC         ; Set C as OUTPUT
  290.    
  291.     ; SET BSR BANK
  292.     MOVLB 0x0F
  293.    
  294.     ; ADC
  295.     MOVLW b'00000000'
  296.     MOVWF ADCON1, 1
  297.     MOVLW b'00000000'
  298.     MOVWF ADCON2, 1
  299.     MOVLW b'00000000'
  300.     MOVWF ADCON3, 1
  301.     MOVLW b'10000000'
  302.     MOVWF ADCON0        ; Enable ADC
  303.     MOVLW b'00001000'
  304.     ;MOVLW b'00111111'  ; A TESTER
  305.     MOVWF ADCLK, 1      ; Fosc
  306.     MOVLW b'00000000'
  307.     MOVWF ADREF, 1       ; Voltage reference (VREF-=AVss, VREF+=Vdd)
  308.     MOVLW b'00000000'    ; ANA0
  309.     MOVWF ADPCH, 1       ; ANA0 by default
  310.     MOVLW b'11111111'
  311.     MOVWF ADACQ, 1       ; Acquisition Time = Beaucoup
  312.     MOVLW b'00011111'
  313.     MOVWF ANSELA, 1     ; Analog inputs
  314.    
  315.    
  316.     ; STATUS LED ON
  317.     BSF LATB, 4
  318.    
  319.     ; LED MATRIX OFF
  320.     BCF LATB, 5
  321.    
  322.     ; SIDE LEDs OFF
  323.     MOVLW 0x00
  324.     MOVWF LATC
  325.    
  326.     ; MATRIX SIZE
  327.     MOVLW 0x08
  328.     MOVWF MATRIX_WIDTH
  329.     MOVLW 0x08
  330.     MOVWF MATRIX_HEIGHT
  331.    
  332.     ; VECTOR PTR
  333.     MOVLW 0x02
  334.     MOVWF VEC_HIGH
  335.     MOVLW 0x00
  336.     MOVWF VEC_LOW
  337.    
  338.     ; ITERATORS AND SIZES DEFAULT (=0)
  339.     MOVLW 0x00
  340.     MOVWF VEC_SIZE
  341.     MOVWF MATRIX_ITR
  342.     MOVWF TILE_ITR
  343.     MOVWF FILL_ITR
  344.    
  345.     ; RESET PTR0
  346.     CALL RESET_PTR0
  347.    
  348.     ; SET ALL LED AND VECTOR TO 0
  349.     CALL COL_LVL_0
  350.     CALL COL_LVL_0
  351.     CALL COL_LVL_0
  352.     CALL COL_LVL_0
  353.     CALL COL_LVL_0
  354.     CALL COL_LVL_0
  355.     CALL COL_LVL_0
  356.     CALL COL_LVL_0
  357.     CALL FILL_MAT
  358.    
  359.     RETURN
  360.  
  361. ;*******************************************************************************
  362. ; VECTOR BASIC FUNCTIONS
  363. ;*******************************************************************************
  364.    
  365. ; RESET PTR0
  366. RESET_PTR0
  367.     MOVF VEC_HIGH, 0
  368.     MOVWF FSR0H
  369.     MOVF VEC_LOW, 0
  370.     MOVWF FSR0L
  371.    
  372.     RETURN
  373.    
  374. ; PUSH VALUE IN VECTOR
  375. VEC_PUSH
  376.     MOVWF POSTINC0
  377.     INCF VEC_SIZE
  378.    
  379.     RETURN
  380.  
  381. ; RETURN NEXT VALUE OF VECTOR
  382. VEC_PULL
  383.     MOVF POSTINC0, 0
  384.    
  385.     RETURN
  386.  
  387. ;*******************************************************************************
  388. ; WRITING MATRIX LED STREAM
  389. ;*******************************************************************************
  390.  
  391. ; WRITE 0 INTO LED STREAM
  392. LEDW0 ; 3 10 OU 4 11
  393.     BSF LATB, 5
  394.     NOP
  395.     NOP
  396.     NOP
  397.     NOP
  398.     NOP
  399.     BCF LATB, 5
  400.     NOP
  401.     NOP
  402.     NOP
  403.     NOP
  404.     NOP
  405.     NOP
  406.     NOP
  407.    
  408.     RETURN
  409.  
  410. ; WRITE 1 INTO LED STREAM
  411. LEDW1 ; 11 2 OU 12 3
  412.     BSF LATB, 5
  413.     NOP
  414.     NOP
  415.     NOP
  416.     NOP
  417.     NOP
  418.     NOP
  419.     NOP
  420.     NOP
  421.     NOP
  422.     NOP
  423.     NOP
  424.     NOP
  425.     NOP;
  426.     NOP;
  427.     BCF LATB, 5
  428.  
  429.     RETURN
  430.  
  431. ; WRITE LED STREAM FOR A GIVEN VALUE ([0; 255] in WREG)
  432. LED    
  433.     BTFSC WREG, 0
  434.     CALL LEDW1
  435.     BTFSS WREG, 0
  436.     CALL LEDW0
  437.        
  438.     BTFSC WREG, 1
  439.     CALL LEDW1
  440.     BTFSS WREG, 1
  441.     CALL LEDW0
  442.        
  443.     BTFSC WREG, 2
  444.     CALL LEDW1
  445.     BTFSS WREG, 2
  446.     CALL LEDW0
  447.        
  448.     BTFSC WREG, 3
  449.     CALL LEDW1
  450.     BTFSS WREG, 3
  451.     CALL LEDW0
  452.        
  453.     BTFSC WREG, 4
  454.     CALL LEDW1
  455.     BTFSS WREG, 4
  456.     CALL LEDW0
  457.        
  458.     BTFSC WREG, 5
  459.     CALL LEDW1
  460.     BTFSS WREG, 5
  461.     CALL LEDW0
  462.        
  463.     BTFSC WREG, 6
  464.     CALL LEDW1
  465.     BTFSS WREG, 6
  466.     CALL LEDW0
  467.        
  468.     BTFSC WREG, 7
  469.     CALL LEDW1
  470.     BTFSS WREG, 7
  471.     CALL LEDW0
  472.    
  473.    
  474.     RETURN
  475.  
  476. ;*******************************************************************************
  477. ; TEMPO ROUTINES
  478. ;*******************************************************************************
  479.    
  480. ; TEMPO ROUTINE LVL 1
  481. TEMPO_1
  482.     MOVLW 0xFF
  483.     MOVWF i
  484.    
  485. DEC_I
  486.     DECF i
  487.     MOVLW 0x00
  488.     CPFSEQ i
  489.         GOTO DEC_I
  490.        
  491.     RETURN
  492.  
  493. ; TEMPO ROUTINE LVL 2
  494. TEMPO_2
  495.     MOVLW 0xFF
  496.     MOVWF j
  497.    
  498. DEC_J
  499.     CALL TEMPO_1
  500.     DECF j
  501.     MOVLW 0x00
  502.     CPFSEQ j
  503.         GOTO DEC_J
  504.        
  505.     RETURN
  506.    
  507. ; TEMPO ROUTINE LVL 3
  508. TEMPO_3    
  509.     MOVLW 0x05
  510.     MOVWF k
  511.    
  512. DEC_K
  513.     CALL TEMPO_2
  514.     DECF k
  515.     MOVLW 0x00
  516.     CPFSEQ k
  517.         GOTO DEC_K
  518.        
  519.     RETURN
  520.  
  521. ;*******************************************************************************
  522. ; MATRIX STREAMING (FROM VECTOR)
  523. ;*******************************************************************************
  524.  
  525. ; STREAM A MATRIX TILE
  526. TILE
  527.     CALL VEC_PULL
  528.     CALL LED
  529.     CALL VEC_PULL
  530.     CALL LED
  531.     CALL VEC_PULL
  532.     CALL LED
  533.     CALL VEC_PULL
  534.     CALL LED
  535.     INCF TILE_ITR
  536.    
  537.     RETURN
  538.    
  539. ; STREAM A MATRIX WIDTH    
  540. WIDTH
  541.     ; Reset TILE_ITR
  542.     MOVLW 0x00
  543.     MOVWF TILE_ITR
  544.    
  545.     ; Do TILE while TILE_ITR < MATRIX_WIDTH
  546. WIDTH_DO_TILE
  547.     CALL TILE
  548.     MOVF MATRIX_WIDTH, 0
  549.     CPFSLT TILE_ITR
  550.         RETURN
  551.    
  552.     GOTO WIDTH_DO_TILE
  553.    
  554.     RETURN
  555.  
  556. ; STREAM ALL THE MATRIX
  557. FILL_MAT
  558.     ; Reset MATRIX_ITR
  559.     MOVLW 0x00
  560.     MOVWF MATRIX_ITR
  561.    
  562.     ; Do WIDTH while MATRIX_ITR < MATRIX_HEIGHT
  563. HEIGHT_DO_TILE
  564.     CALL WIDTH
  565.     INCF MATRIX_ITR
  566.     MOVF MATRIX_HEIGHT, 0
  567.     CPFSLT MATRIX_ITR
  568.         RETURN
  569.    
  570.     GOTO HEIGHT_DO_TILE
  571.    
  572.     RETURN
  573.  
  574. ;*******************************************************************************
  575. ; TILE LEVELS WRITING (INTO VECTOR)
  576. ;*******************************************************************************
  577.    
  578. ; TILE LEDS FOR NO LVL (NO COLORS)
  579. TILE_LVL_0
  580.     MOVLW 0x00
  581.     CALL VEC_PUSH
  582.     MOVLW 0x00
  583.     CALL VEC_PUSH
  584.     MOVLW 0x00
  585.     CALL VEC_PUSH
  586.     MOVLW 0x00
  587.     CALL VEC_PUSH
  588.    
  589.     RETURN
  590.  
  591. ; TILE LEDS FOR COLOR LVL 1
  592. TILE_LVL_1    
  593.     MOVLW 0x00
  594.     CALL VEC_PUSH
  595.     MOVLW 0x60
  596.     CALL VEC_PUSH
  597.     MOVLW 0x20
  598.     CALL VEC_PUSH
  599.     MOVLW 0x00
  600.     CALL VEC_PUSH
  601.     RETURN
  602.    
  603. ; TILE LEDS FOR COLOR LVL 2
  604. TILE_LVL_2
  605.     MOVLW 0x00
  606.     CALL VEC_PUSH
  607.     MOVLW 0x00
  608.     CALL VEC_PUSH
  609.     MOVLW 0xA0
  610.     CALL VEC_PUSH
  611.     MOVLW 0x00
  612.     CALL VEC_PUSH
  613.    
  614.     RETURN
  615.    
  616. ; TILE LEDS FOR COLOR LVL 3
  617. TILE_LVL_3
  618.     MOVLW 0x90
  619.     CALL VEC_PUSH
  620.     MOVLW 0x00
  621.     CALL VEC_PUSH
  622.     MOVLW 0x10
  623.     CALL VEC_PUSH
  624.     MOVLW 0x00
  625.     CALL VEC_PUSH
  626.     RETURN
  627.    
  628. ; TILE LEDS FOR COLOR LVL 4
  629. TILE_LVL_4
  630.     MOVLW 0x70
  631.     CALL VEC_PUSH
  632.     MOVLW 0x00
  633.     CALL VEC_PUSH
  634.     MOVLW 0x40
  635.     CALL VEC_PUSH
  636.     MOVLW 0x00
  637.     CALL VEC_PUSH
  638.     RETURN
  639.    
  640. ; TILE LEDS FOR COLOR LVL 5
  641. TILE_LVL_5
  642.     MOVLW 0x30
  643.     CALL VEC_PUSH
  644.     MOVLW 0x80
  645.     CALL VEC_PUSH
  646.     MOVLW 0x00
  647.     CALL VEC_PUSH
  648.     MOVLW 0x00
  649.     CALL VEC_PUSH
  650.     RETURN
  651.    
  652. ; TILE LEDS FOR COLOR LVL 6
  653. TILE_LVL_6
  654.     MOVLW 0x58
  655.     CALL VEC_PUSH
  656.     MOVLW 0x28
  657.     CALL VEC_PUSH
  658.     MOVLW 0x00
  659.     CALL VEC_PUSH
  660.     MOVLW 0x00
  661.     CALL VEC_PUSH
  662.     RETURN
  663.    
  664. ; TILE LEDS FOR COLOR LVL 7
  665. TILE_LVL_7
  666.     MOVLW 0x20
  667.     CALL VEC_PUSH
  668.     MOVLW 0x70
  669.     CALL VEC_PUSH
  670.     MOVLW 0x00
  671.     CALL VEC_PUSH
  672.     MOVLW 0x00
  673.     CALL VEC_PUSH
  674.     RETURN
  675.    
  676. ; TILE LEDS FOR COLOR LVL 8
  677. TILE_LVL_8
  678.     MOVLW 0x00
  679.     CALL VEC_PUSH
  680.     MOVLW 0xB0
  681.     CALL VEC_PUSH
  682.     MOVLW 0x00
  683.     CALL VEC_PUSH
  684.     MOVLW 0x00
  685.     CALL VEC_PUSH
  686.     RETURN
  687.  
  688. ;*******************************************************************************
  689. ; COLUMN FILL LEVELS WRITING (INTO VECTOR)
  690. ;*******************************************************************************
  691.    
  692. ; FILL COLUMN FOR LEVEL 0
  693. COL_LVL_0
  694.     CALL TILE_LVL_0
  695.     CALL TILE_LVL_0
  696.     CALL TILE_LVL_0
  697.     CALL TILE_LVL_0
  698.     CALL TILE_LVL_0
  699.     CALL TILE_LVL_0
  700.     CALL TILE_LVL_0
  701.     CALL TILE_LVL_0
  702.     CALL TILE_LVL_0
  703.     CALL TILE_LVL_0
  704.     CALL TILE_LVL_0
  705.     CALL TILE_LVL_0
  706.     CALL TILE_LVL_0
  707.     CALL TILE_LVL_0
  708.     CALL TILE_LVL_0
  709.     CALL TILE_LVL_0
  710.    
  711.     RETURN
  712.    
  713. ; FILL COLUMN FOR LEVEL 1
  714. COL_LVL_1
  715.     CALL TILE_LVL_1
  716.     CALL TILE_LVL_0
  717.     CALL TILE_LVL_0
  718.     CALL TILE_LVL_0
  719.     CALL TILE_LVL_0
  720.     CALL TILE_LVL_0
  721.     CALL TILE_LVL_0
  722.     CALL TILE_LVL_0
  723.     CALL TILE_LVL_1
  724.     CALL TILE_LVL_0
  725.     CALL TILE_LVL_0
  726.     CALL TILE_LVL_0
  727.     CALL TILE_LVL_0
  728.     CALL TILE_LVL_0
  729.     CALL TILE_LVL_0
  730.     CALL TILE_LVL_0
  731.    
  732.     RETURN
  733.    
  734. ; FILL COLUMN FOR LEVEL 2
  735. COL_LVL_2
  736.     CALL TILE_LVL_1
  737.     CALL TILE_LVL_2
  738.     CALL TILE_LVL_0
  739.     CALL TILE_LVL_0
  740.     CALL TILE_LVL_0
  741.     CALL TILE_LVL_0
  742.     CALL TILE_LVL_0
  743.     CALL TILE_LVL_0
  744.     CALL TILE_LVL_1
  745.     CALL TILE_LVL_2
  746.     CALL TILE_LVL_0
  747.     CALL TILE_LVL_0
  748.     CALL TILE_LVL_0
  749.     CALL TILE_LVL_0
  750.     CALL TILE_LVL_0
  751.     CALL TILE_LVL_0
  752.    
  753.     RETURN
  754.    
  755. ; FILL COLUMN FOR LEVEL 3
  756. COL_LVL_3
  757.     CALL TILE_LVL_1
  758.     CALL TILE_LVL_2
  759.     CALL TILE_LVL_3
  760.     CALL TILE_LVL_0
  761.     CALL TILE_LVL_0
  762.     CALL TILE_LVL_0
  763.     CALL TILE_LVL_0
  764.     CALL TILE_LVL_0
  765.     CALL TILE_LVL_1
  766.     CALL TILE_LVL_2
  767.     CALL TILE_LVL_3
  768.     CALL TILE_LVL_0
  769.     CALL TILE_LVL_0
  770.     CALL TILE_LVL_0
  771.     CALL TILE_LVL_0
  772.     CALL TILE_LVL_0
  773.    
  774.     RETURN
  775.    
  776. ; FILL COLUMN FOR LEVEL 4
  777. COL_LVL_4
  778.     CALL TILE_LVL_1
  779.     CALL TILE_LVL_2
  780.     CALL TILE_LVL_3
  781.     CALL TILE_LVL_4
  782.     CALL TILE_LVL_0
  783.     CALL TILE_LVL_0
  784.     CALL TILE_LVL_0
  785.     CALL TILE_LVL_0
  786.     CALL TILE_LVL_1
  787.     CALL TILE_LVL_2
  788.     CALL TILE_LVL_3
  789.     CALL TILE_LVL_4
  790.     CALL TILE_LVL_0
  791.     CALL TILE_LVL_0
  792.     CALL TILE_LVL_0
  793.     CALL TILE_LVL_0
  794.    
  795.     RETURN
  796.    
  797. ; FILL COLUMN FOR LEVEL 5
  798. COL_LVL_5
  799.     CALL TILE_LVL_1
  800.     CALL TILE_LVL_2
  801.     CALL TILE_LVL_3
  802.     CALL TILE_LVL_4
  803.     CALL TILE_LVL_5
  804.     CALL TILE_LVL_0
  805.     CALL TILE_LVL_0
  806.     CALL TILE_LVL_0
  807.     CALL TILE_LVL_1
  808.     CALL TILE_LVL_2
  809.     CALL TILE_LVL_3
  810.     CALL TILE_LVL_4
  811.     CALL TILE_LVL_5
  812.     CALL TILE_LVL_0
  813.     CALL TILE_LVL_0
  814.     CALL TILE_LVL_0
  815.    
  816.     RETURN
  817.    
  818. ; FILL COLUMN FOR LEVEL 6
  819. COL_LVL_6
  820.     CALL TILE_LVL_1
  821.     CALL TILE_LVL_2
  822.     CALL TILE_LVL_3
  823.     CALL TILE_LVL_4
  824.     CALL TILE_LVL_5
  825.     CALL TILE_LVL_6
  826.     CALL TILE_LVL_0
  827.     CALL TILE_LVL_0
  828.     CALL TILE_LVL_1
  829.     CALL TILE_LVL_2
  830.     CALL TILE_LVL_3
  831.     CALL TILE_LVL_4
  832.     CALL TILE_LVL_5
  833.     CALL TILE_LVL_6
  834.     CALL TILE_LVL_0
  835.     CALL TILE_LVL_0
  836.    
  837.     RETURN
  838.    
  839. ; FILL COLUMN FOR LEVEL 7
  840. COL_LVL_7
  841.     CALL TILE_LVL_1
  842.     CALL TILE_LVL_2
  843.     CALL TILE_LVL_3
  844.     CALL TILE_LVL_4
  845.     CALL TILE_LVL_5
  846.     CALL TILE_LVL_6
  847.     CALL TILE_LVL_7
  848.     CALL TILE_LVL_0
  849.     CALL TILE_LVL_1
  850.     CALL TILE_LVL_2
  851.     CALL TILE_LVL_3
  852.     CALL TILE_LVL_4
  853.     CALL TILE_LVL_5
  854.     CALL TILE_LVL_6
  855.     CALL TILE_LVL_7
  856.     CALL TILE_LVL_0
  857.    
  858.     RETURN
  859.    
  860. ; FILL COLUMN FOR LEVEL 8
  861. COL_LVL_8
  862.     CALL TILE_LVL_1
  863.     CALL TILE_LVL_2
  864.     CALL TILE_LVL_3
  865.     CALL TILE_LVL_4
  866.     CALL TILE_LVL_5
  867.     CALL TILE_LVL_6
  868.     CALL TILE_LVL_7
  869.     CALL TILE_LVL_8
  870.     CALL TILE_LVL_1
  871.     CALL TILE_LVL_2
  872.     CALL TILE_LVL_3
  873.     CALL TILE_LVL_4
  874.     CALL TILE_LVL_5
  875.     CALL TILE_LVL_6
  876.     CALL TILE_LVL_7
  877.     CALL TILE_LVL_8
  878.    
  879.     RETURN
  880.    
  881. ; WRITE A COLUMN
  882. WRITE_COL_VEC
  883.     MOVWF COL_LEVEL
  884.  
  885. ; COLUMN: TEST FOR LEVEL 1
  886. WRITE_COL_VEC_1
  887.     MOVLW 0x01
  888.     CPFSEQ COL_LEVEL
  889.         GOTO WRITE_COL_VEC_2
  890.     CALL COL_LVL_1
  891.     GOTO WRITE_COL_VEC_END
  892.    
  893. ; COLUMN: TEST FOR LEVEL 2    
  894. WRITE_COL_VEC_2
  895.     MOVLW 0x02
  896.     CPFSEQ COL_LEVEL
  897.         GOTO WRITE_COL_VEC_3
  898.     CALL COL_LVL_2
  899.     GOTO WRITE_COL_VEC_END
  900.  
  901. ; COLUMN: TEST FOR LEVEL 3
  902. WRITE_COL_VEC_3
  903.     MOVLW 0x03
  904.     CPFSEQ COL_LEVEL
  905.         GOTO WRITE_COL_VEC_4
  906.     CALL COL_LVL_3
  907.     GOTO WRITE_COL_VEC_END
  908.  
  909. ; COLUMN: TEST FOR LEVEL 4
  910. WRITE_COL_VEC_4
  911.     MOVLW 0x04
  912.     CPFSEQ COL_LEVEL
  913.         GOTO WRITE_COL_VEC_5
  914.     CALL COL_LVL_4
  915.     GOTO WRITE_COL_VEC_END
  916.  
  917. ; COLUMN: TEST FOR LEVEL 5    
  918. WRITE_COL_VEC_5
  919.     MOVLW 0x05
  920.     CPFSEQ COL_LEVEL
  921.         GOTO WRITE_COL_VEC_6
  922.     CALL COL_LVL_5
  923.     GOTO WRITE_COL_VEC_END
  924.  
  925. ; COLUMN: TEST FOR LEVEL 6  
  926. WRITE_COL_VEC_6
  927.     MOVLW 0x06
  928.     CPFSEQ COL_LEVEL
  929.         GOTO WRITE_COL_VEC_7
  930.     CALL COL_LVL_6
  931.     GOTO WRITE_COL_VEC_END
  932.  
  933. ; COLUMN: TEST FOR LEVEL 7
  934. WRITE_COL_VEC_7
  935.     MOVLW 0x07
  936.     CPFSEQ COL_LEVEL
  937.         GOTO WRITE_COL_VEC_8
  938.     CALL COL_LVL_7
  939.     GOTO WRITE_COL_VEC_END
  940.  
  941. ; COLUMN: TEST FOR LEVEL 8
  942. WRITE_COL_VEC_8
  943.     MOVLW 0x08
  944.     CPFSEQ COL_LEVEL
  945.         GOTO WRITE_COL_VEC_0
  946.     CALL COL_LVL_8
  947.     GOTO WRITE_COL_VEC_END
  948.  
  949. ; COLUMN: DEFAULT LEVEL 0
  950. WRITE_COL_VEC_0
  951.     CALL COL_LVL_0
  952.  
  953. ; COLUMN: END POINT    
  954. WRITE_COL_VEC_END
  955.     RETURN
  956.  
  957. ;*******************************************************************************
  958. ; ADC AND FREQUENCY LEVELS UTILS
  959. ;*******************************************************************************
  960.  
  961. ; WAIT FOR ADC TO COMPUTE
  962. POLL
  963.     BTFSC ADCON0, 0
  964.     GOTO POLL
  965.    
  966.     RETURN
  967.  
  968. ; SHOW CURRENT ADC LEVEL ON RIGHT SIDE LEDS
  969. LED_LEVEL
  970.     ; INIT: TURN OFF LEDs
  971.     MOVLW 0x00
  972.     MOVWF LATC
  973.    
  974.     MOVLW 0x80      ; > 0, turn on LED0
  975.     CPFSLT TEMP
  976.     BSF LATC, 7
  977.    
  978.     MOVLW 0x90      ; > 32, turn on LED3
  979.     CPFSLT TEMP
  980.     BSF LATC, 6
  981.    
  982.     MOVLW 0xA0      ; > 64, turn on LED2
  983.     CPFSLT TEMP
  984.     BSF LATC, 5
  985.    
  986.     MOVLW 0xB0     ; > 96, turn on LED2
  987.     CPFSLT TEMP
  988.     BSF LATC, 4
  989.    
  990.     MOVLW 0xC0      ; > 128, turn on LED2
  991.     CPFSLT TEMP
  992.     BSF LATC, 3
  993.    
  994.     MOVLW 0xD0      ; > 160, turn on LED2
  995.     CPFSLT TEMP
  996.     BSF LATC, 2
  997.    
  998.     MOVLW 0xE0      ; > 192, turn on LED2
  999.     CPFSLT TEMP
  1000.     BSF LATC, 1
  1001.    
  1002.     MOVLW 0xF0      ; > 224, turn on LED2
  1003.     CPFSLT TEMP
  1004.     BSF LATC, 0
  1005.    
  1006.     RETURN
  1007.  
  1008. ;*******************************************************************************
  1009. ; FREQUENCY LEVELS ADJUSTERS
  1010. ;*******************************************************************************
  1011.  
  1012. ; FREQUENCY LEVEL SETTERS
  1013. ; SET FREQUENCY LEVEL TO 1 AND GO TO FREQUENCY CALCULATION END POINT
  1014. SET_FREQ_1
  1015.     MOVLW 0x01
  1016.     GOTO CALC_FREQ_END
  1017.  
  1018. ; SET FREQUENCY LEVEL TO 2 AND GO TO FREQUENCY CALCULATION END POINT
  1019. SET_FREQ_2
  1020.     MOVLW 0x02
  1021.     GOTO CALC_FREQ_END
  1022.  
  1023. ; SET FREQUENCY LEVEL TO 3 AND GO TO FREQUENCY CALCULATION END POINT
  1024. SET_FREQ_3
  1025.     MOVLW 0x03
  1026.     GOTO CALC_FREQ_END
  1027.    
  1028. ; SET FREQUENCY LEVEL TO 4 AND GO TO FREQUENCY CALCULATION END POINT
  1029. SET_FREQ_4
  1030.     MOVLW 0x04
  1031.     GOTO CALC_FREQ_END
  1032.    
  1033. ; SET FREQUENCY LEVEL TO 5 AND GO TO FREQUENCY CALCULATION END POINT
  1034. SET_FREQ_5
  1035.     MOVLW 0x05
  1036.     GOTO CALC_FREQ_END
  1037.    
  1038. ; SET FREQUENCY LEVEL TO 6 AND GO TO FREQUENCY CALCULATION END POINT
  1039. SET_FREQ_6
  1040.     MOVLW 0x06
  1041.     GOTO CALC_FREQ_END
  1042.    
  1043. ; SET FREQUENCY LEVEL TO 7 AND GO TO FREQUENCY CALCULATION END POINT
  1044. SET_FREQ_7
  1045.     MOVLW 0x07
  1046.     GOTO CALC_FREQ_END
  1047.    
  1048. ; SET FREQUENCY LEVEL TO 8 AND GO TO FREQUENCY CALCULATION END POINT
  1049. SET_FREQ_8
  1050.     MOVLW 0x08
  1051.     GOTO CALC_FREQ_END
  1052.  
  1053. ; FREQUENCY CALCULATION END POINT
  1054. CALC_FREQ_END
  1055.     RETURN
  1056.    
  1057. ; RETURN A VALUE IN W [0, 8] DEPENDING ON THE (LOW ?) FREQUENCY VOLTAGE
  1058. CALC_FREQ_LOW
  1059.     ; > 4.67V (238, 0xEE)
  1060.     MOVLW 0xDB
  1061.     CPFSLT TEMP
  1062.     GOTO SET_FREQ_8
  1063.    
  1064.     ; > 4.34V (221, 0xDD)
  1065.     MOVLW 0xD1
  1066.     CPFSLT TEMP
  1067.     GOTO SET_FREQ_7
  1068.    
  1069.     ; > 4V (204, 0xCC)
  1070.     MOVLW 0xC8
  1071.     CPFSLT TEMP
  1072.     GOTO SET_FREQ_6
  1073.    
  1074.     ; > 3.67V (187, 0xBB)
  1075.     MOVLW 0xBE
  1076.     CPFSLT TEMP
  1077.     GOTO SET_FREQ_5
  1078.    
  1079.     ; > 3.34V (170, 0xAA)
  1080.     MOVLW 0xB5
  1081.     CPFSLT TEMP
  1082.     GOTO SET_FREQ_4
  1083.    
  1084.     ; > 3V (153, 0x99)
  1085.     MOVLW 0xAB
  1086.     CPFSLT TEMP
  1087.     GOTO SET_FREQ_3
  1088.    
  1089.     ; > 2.67V (136, 0x88)
  1090.     MOVLW 0xA2
  1091.     CPFSLT TEMP
  1092.     GOTO SET_FREQ_2
  1093.    
  1094.     ; > 2.36V (120, 0x77)
  1095.     MOVLW 0x99
  1096.     CPFSLT TEMP
  1097.     GOTO SET_FREQ_1
  1098.    
  1099.     ; DEFAULT VALUE = 0x00
  1100.     MOVLW 0x00
  1101.    
  1102.     RETURN
  1103.    
  1104. ;*******************************************************************************
  1105. ; ADC FREQUENCY COMPUTION
  1106. ;*******************************************************************************
  1107.  
  1108. ; GET LOW FREQUENCY VALUE FROM ADC
  1109. GET_FREQ_LOW
  1110.     MOVLW b'00000000'   ; ANA0
  1111.     MOVLB 0x0F
  1112.     MOVWF ADPCH, 1      ; SELECT ANA0
  1113.     BSF ADCON0, 0       ; START ADC
  1114.     CALL POLL           ; WAIT FOR RESULT
  1115.     MOVFF ADRESH, TEMP
  1116.    
  1117.     CALL CALC_FREQ_LOW  ; CALCUL FREQUENCY LEVEL
  1118.    
  1119.     RETURN
  1120.  
  1121. ; GET MEDIUM LOW FREQUENCY VALUE FROM ADC
  1122. GET_FREQ_MEDIUM_LOW
  1123.     MOVLW b'00000001'   ; ANA1
  1124.     MOVLB 0x0F
  1125.     MOVWF ADPCH, 1      ; SELECT ANA1
  1126.     BSF ADCON0, 0       ; START ADC
  1127.     CALL POLL           ; WAIT FOR RESULT
  1128.     MOVFF ADRESH, TEMP
  1129.    
  1130.     CALL CALC_FREQ_LOW  ; CALCUL FREQUENCY LEVEL
  1131.    
  1132.     RETURN
  1133.  
  1134. ; GET MEDIUM HIGH FREQUENCY VALUE FROM ADC
  1135. GET_FREQ_MEDIUM_HIGH
  1136.     MOVLW b'00000010'   ; ANA2
  1137.     MOVLB 0x0F
  1138.     MOVWF ADPCH, 1      ; SELECT ANA2
  1139.     BSF ADCON0, 0       ; START ADC
  1140.     CALL POLL           ; WAIT FOR RESULT
  1141.     MOVFF ADRESH, TEMP
  1142.    
  1143.     CALL CALC_FREQ_LOW  ; CALCUL FREQUENCY LEVEL
  1144.    
  1145.     RETURN
  1146.    
  1147. ; GET HIGH FREQUENCY VALUE FROM ADC
  1148. GET_FREQ_HIGH
  1149.     MOVLW b'00000011'   ; ANA3
  1150.     MOVLB 0x0F
  1151.     MOVWF ADPCH, 1      ; SELECT ANA3
  1152.     BSF ADCON0, 0       ; START ADC
  1153.     CALL POLL           ; WAIT FOR RESULT
  1154.     MOVFF ADRESH, TEMP
  1155.    
  1156.     CALL CALC_FREQ_LOW  ; CALCUL FREQUENCY LEVEL
  1157.    
  1158.     RETURN
  1159.    
  1160. ; UP LEDs DEPENDING ON THE VOLUME
  1161. LED_VOLUME
  1162.     MOVLW b'00000100'   ; ANA4
  1163.     MOVLB 0x0F
  1164.     MOVWF ADPCH, 1      ; SELECT ANA3
  1165.     BSF ADCON0, 0       ; START ADC
  1166.     CALL POLL           ; WAIT FOR RESULT
  1167.     MOVFF ADRESH, TEMP
  1168.    
  1169.     CALL LED_LEVEL
  1170.    
  1171.     RETURN
  1172.    
  1173. ;*******************************************************************************
  1174. ; MAIN CODE - RUN
  1175. ;*******************************************************************************
  1176.  
  1177. RUN
  1178.     ; Init values
  1179.     CALL INIT
  1180.    
  1181.    
  1182.     ; --- MAIN LOOP
  1183.     LOOP
  1184.         CALL LED_VOLUME
  1185.    
  1186.         CALL RESET_PTR0 ; RESET VECTOR POSITION
  1187.        
  1188.         CALL GET_FREQ_LOW   ; GET LOW FREQUENCY LEVEL
  1189.         CALL WRITE_COL_VEC  ; WRITE COLUMN
  1190.         ;CALL TEMPO_2
  1191.        
  1192.         CALL GET_FREQ_MEDIUM_LOW   ; GET LOW FREQUENCY LEVEL
  1193.         CALL WRITE_COL_VEC  ; WRITE COLUMN
  1194.         ;CALL TEMPO_2
  1195.        
  1196.         CALL GET_FREQ_MEDIUM_HIGH   ; GET LOW FREQUENCY LEVEL
  1197.         CALL WRITE_COL_VEC  ; WRITE COLUMN
  1198.         ;CALL TEMPO_2
  1199.        
  1200.         CALL GET_FREQ_HIGH   ; GET LOW FREQUENCY LEVEL
  1201.         CALL WRITE_COL_VEC  ; WRITE COLUMN
  1202.         ;CALL TEMPO_2
  1203.        
  1204.         ; FILL MATRIX
  1205.         CALL RESET_PTR0
  1206.         CALL FILL_MAT
  1207.        
  1208.         ;MOVLW 0x00
  1209.         ;MOVWF ADRESH
  1210.        
  1211.         ; WAIT
  1212.         CALL TEMPO_2
  1213.        
  1214.         GOTO LOOP
  1215.        
  1216.     GOTO $
  1217.  
  1218.     END
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