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Mikestriken

Instruction_Memory

Apr 7th, 2023 (edited)
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VHDL 2.51 KB | None | 0 0
  1. library ieee;
  2. use ieee.std_logic_1164.all;
  3. use ieee.numeric_std.all;
  4.  
  5. entity instruction_memory is
  6.     generic (
  7.         IM_Register_Count : integer := 1024  -- Number of instructions in memory
  8.     );
  9.     port (
  10.         address_input : in std_logic_vector(63 downto 0);
  11.             instruction_output : out std_logic_vector(31 downto 0)
  12.     );
  13. end entity instruction_memory;
  14.  
  15. architecture Behavioral of instruction_memory is
  16.  
  17.     type register_file is array (0 to IM_Register_Count-1) of std_logic_vector(31 downto 0);
  18.    
  19.     constant instructions : register_file := (
  20.         -- Example instructions:
  21.         0 => "110100101"&"00"&"0000000000000010"&"00000",  -- D2800040 -- MOVZ X0, #2
  22.         1 => "110100101"&"00"&"0000000000000101"&"00001", -- D28000A1 -- MOVZ X1, #5
  23.         2 => "110100101"&"00"&"0000000000000001"&"00010", -- D2800022 -- MOVZ X2, #1
  24.         3 => "1001000100"&"000000000001"&"00000"&"11110", -- 9100041E -- ADDI X30, X0, #1 = 3
  25.         4 => "10001011000"&"00001"&"000000"&"00000"&"11101", -- 8B01001D -- ADD X29, X0, X1 = 7
  26.         5 => "10001011000"&"00001"&"000000"&"00000"&"11100", -- CB01001C -- SUB X29, X0, X1 = -3
  27.         6 => "11010011011"&"00000"&"000001"&"00010"&"11011", -- D360045B -- LSL X27, X2, #1 = 2
  28.         7 => "10001010000"&"00010"&"000000"&"00000"&"11010", -- 8A02001A -- AND X26, X0, X2 = 0
  29.         8 => "10101010000"&"00010"&"000000"&"00000"&"11001", -- AA020019 -- OR X25, X0, X2 = 3
  30.         9 => "11111000000"&"000000000"&"01"&"11111"&"00001", -- F80007E1 -- STUR X1, [XZR, #0] = 5
  31.         10 => "11111000000"&"000000100"&"01"&"11111"&"00001", -- F80047E1 -- STUR X1, [XZR, #4] = 5
  32.         11 => "11111000010"&"000000100"&"01"&"11111"&"11000", -- F84047F8 -- LDUR X24, [XZR, #4] = 5
  33.         others=>x"00000000"
  34.     );
  35.    
  36. begin
  37.  
  38.     process(address_input)
  39.         variable register_index : integer range 0 to IM_Register_Count-1;
  40.     begin
  41.         -- Convert address input to desired instruction index
  42.         if to_integer(unsigned(address_input)) > 0 or to_integer(unsigned(address_input)) < 0 then
  43.             register_index := (to_integer(unsigned(address_input)) + 1) / 4;  -- Divide by 4 to get instruction index
  44.         else
  45.             register_index := 0;
  46.         end if;
  47.        
  48.         -- Output Instruction
  49.         if register_index >= IM_Register_Count then  -- Check for out-of-bounds address
  50.             instruction_output <= (others => '0');  -- Default to all zeros
  51.         else
  52.             instruction_output  <= instructions(register_index);
  53.         end if;
  54.     end process;
  55.    
  56. end Behavioral;
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