Ejemplo PIC-AS en MPLABX

;-------------------------------------------------------------------------------
;
;  Archivo:   main.s
;  Fecha de creación/modificación: 08 Febrero 2021
;  Author: Kurt Kellner
;  Dispositivo: PIC16F887
;  Descripción: (Qué hace el programa)
;  Hardware: (Explicar qué está conectado en dónde)
;
;-------------------------------------------------------------------------------

;-------------------------------------------------------------------------------
; Librerías incluidas
;-------------------------------------------------------------------------------

PROCESSOR 16F887
#include <xc.inc>
#include "test.s"

;-------------------------------------------------------------------------------
; Palabras de configuración
;-------------------------------------------------------------------------------

; CONFIG1
  CONFIG  FOSC = XT             ; Oscillator Selection bits (XT oscillator: Crystal/resonator on RA6/OSC2/CLKOUT and RA7/OSC1/CLKIN)
  CONFIG  WDTE = OFF            ; Watchdog Timer Enable bit (WDT disabled and can be enabled by SWDTEN bit of the WDTCON register)
  CONFIG  PWRTE = OFF           ; Power-up Timer Enable bit (PWRT disabled)
  CONFIG  MCLRE = OFF           ; RE3/MCLR pin function select bit (RE3/MCLR pin function is digital input, MCLR internally tied to VDD)
  CONFIG  CP = OFF              ; Code Protection bit (Program memory code protection is disabled)
  CONFIG  CPD = OFF             ; Data Code Protection bit (Data memory code protection is disabled)
  CONFIG  BOREN = OFF           ; Brown Out Reset Selection bits (BOR disabled)
  CONFIG  IESO = OFF            ; Internal External Switchover bit (Internal/External Switchover mode is disabled)
  CONFIG  FCMEN = OFF           ; Fail-Safe Clock Monitor Enabled bit (Fail-Safe Clock Monitor is disabled)
  CONFIG  LVP = OFF             ; Low Voltage Programming Enable bit (RB3 pin has digital I/O, HV on MCLR must be used for programming)

; CONFIG2
  CONFIG  BOR4V = BOR40V        ; Brown-out Reset Selection bit (Brown-out Reset set to 4.0V)
  CONFIG  WRT = OFF             ; Flash Program Memory Self Write Enable bits (Write protection off)


;-------------------------------------------------------------------------------
; Macros
;-------------------------------------------------------------------------------

bank0 MACRO
    bcf STATUS, 5
    bcf STATUS, 6
    endm

bank1 macro
    bsf STATUS, 5
    bcf STATUS, 6
    endm

bank2 macro
    bcf STATUS, 5
    bsf STATUS, 6
    endm

bank3 macro
    bsf STATUS, 5
    bsf STATUS, 6
    endm

input macro arg1, arg2
    bank1
    bsf arg1, arg2
    bank0
    endm

output macro arg1, arg2
    bank1
    bcf arg1, arg2
    bank0
    endm


;-------------------------------------------------------------------------------
; Variables
;-------------------------------------------------------------------------------

PSECT udata_shr ; variables en memoria RAM compartida entre bancos

var1:
    DS 1 ; Variable var1 con 1 localidad reservada en RAM

var2:
    DS 2 ; Variable var2 con 2 localidades reservadas en RAM

PSECT udata ; variables en cualquier localidad de la memoria RAM
        ; con la excepción de los espacios compartidos (unbanked memory)

var3:
    DS 1

DABS 1, 0x040, 1, var5

var6:
    DB  0xA4

PSECT udata_bank3 ; variables en memoria RAM en el banco 3

var4:
    DS 1


;-------------------------------------------------------------------------------
; Vector de Reset
;-------------------------------------------------------------------------------

PSECT code, delta=2, abs
ORG 0x0000
resetVector:
    goto main

;-------------------------------------------------------------------------------
; Loop principal
;-------------------------------------------------------------------------------

PSECT loopPrincipal, delta=2
;linker: -PloopPrincipal=0x0010

;PSECT loopPrincipal, class=code, delta=2, abs
;ORG 0x000A
main:
    movlw   'a'
    movwf   var1
    movlw   'b'
    movwf   var3
    movlw   'c'
    banksel (var4)
    ;movwf   BANKMASK(var4)
    ;output  TRISB, 7
    banksel TRISA
    clrf    TRISB
    clrf    TRISC
    banksel PORTA
    clrf    PORTB
    movlw   0x02 ; offset
    incf    var5
    call    table
    movwf   PORTC
    goto    main


;-------------------------------------------------------------------------------
; Subrutinas
;-------------------------------------------------------------------------------

func2:
    movlw   0xFF
    movwf   PORTB
    call    fong3
    return

fong3:
    movlw   0x0A
    movwf   PORTB
    return

table:
    addwf   PCL, f
    retlw   0xA1 ;equivalente al 0 en mi 7 segmentos
    retlw   0xA2 ;equ... al 1 en mis 7seg
    retlw   0xA3
    retlw   0xA4


END