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Codec7segmentos

Dec 19th, 2022
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VHDL 1.61 KB | Source Code | 0 0
  1. Library ieee;
  2. use ieee.std_logic_1164.all;
  3.  
  4. entity bcd_7seg is
  5.    
  6.     port(
  7.             bcd : in std_logic_vector(3 downto 0);
  8.             D: out std_logic_vector(6 downto 0)
  9.         );
  10.  
  11.      attribute pin_numbers of bcd_7seg: entity is
  12.     "D(6):21 D(5):20 D(4):19 "
  13. &   "D(3):18 D(2):17 D(1):16 D(0):15 "    -- se deja un espacio despues de g:15 para que al concatenar
  14. &   "BCD(0):11 BCD(1):10 BCD(2):9 BCD(3):8"; -- haya una separacion entre literales
  15.  
  16. end bcd_7seg;
  17.  
  18. architecture cto of  bcd_7seg is
  19. constant zero : std_logic_vector(6 downto 0) := "0000001";
  20. constant uno  : std_logic_vector(6 downto 0) := "1001111";
  21. constant dos  : std_logic_vector(6 downto 0) := "0010010";
  22. constant tres : std_logic_vector(6 downto 0) := "0000110";
  23. constant quat : std_logic_vector(6 downto 0) := "1001100";
  24. constant qint : std_logic_vector(6 downto 0) := "0100100";
  25. constant sixt : std_logic_vector(6 downto 0) := "0100000";
  26. constant sept : std_logic_vector(6 downto 0) := "0001111";
  27. constant octo : std_logic_vector(6 downto 0) := "0000000";
  28. constant nono : std_logic_vector(6 downto 0) := "0000100";
  29. constant OFF  : std_logic_vector(6 downto 0) := "-------";
  30.    
  31.     begin
  32.        
  33.         Conv_codigo : process(BCD)
  34.        
  35.         begin
  36.            
  37.           case bcd is
  38.             when "0000" => D <= zero;
  39.             when "0001" => D <= uno;
  40.             when "0010" => D <= dos;
  41.             when "0011" => D <= tres;
  42.             when "0100" => D <= quat;
  43.             when "0101" => D <= qint;
  44.             when "0110" => D <= sixt;
  45.             when "0111" => D <= sept;
  46.             when "1000" => D <= octo;
  47.             when "1001" => D <= nono;
  48.             when others => D <= OFF;
  49.          
  50.           end case;
  51.  
  52.         end process conv_codigo;
  53.  
  54.     end cto;
  55.  
  56.  
Tags: codec VHDL
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