API tools faq
paste
Advertisement
krot

Assembler Command overview

krot
Jul 22nd, 2018
342
0
Never
Add comment
Not a member of Pastebin yet? Sign Up, it unlocks many cool features!
text 113.20 KB | None | 0 0
raw download clone embed print report
  1.  
  2. Intel 8086 Family Architecture. . . . . . . . . . . . . . . . . . . . . 3
  3.  
  4. Instruction Clock Cycle Calculation . . . . . . . . . . . . . . . . . . 3
  5.  
  6. 8088/8086 Effective Address (EA) Calculation . . . . . . . . . . . . . 3
  7.  
  8. Task State Calculation. . . . . . . . . . . . . . . . . . . . . . . . . 4
  9.  
  10. FLAGS - Intel 8086 Family Flags Register. . . . . . . . . . . . . . . . 4
  11.  
  12. MSW - Machine Status Word (286+ only) . . . . . . . . . . . . . . . . . 5
  13.  
  14. 8086/80186/80286/80386/80486 Instruction Set. . . . . . . . . . . . . . 6
  15. AAA - Ascii Adjust for Addition. . . . . . . . . . . . . . . . . . 6
  16. AAD - Ascii Adjust for Division. . . . . . . . . . . . . . . . . . 6
  17. AAM - Ascii Adjust for Multiplication. . . . . . . . . . . . . . . 6
  18. AAS - Ascii Adjust for Subtraction . . . . . . . . . . . . . . . . 6
  19. ADC - Add With Carry . . . . . . . . . . . . . . . . . . . . . . . 7
  20. ADD - Arithmetic Addition. . . . . . . . . . . . . . . . . . . . . 7
  21. AND - Logical And. . . . . . . . . . . . . . . . . . . . . . . . . 7
  22. ARPL - Adjusted Requested Privilege Level of Selector (286+ PM). . 7
  23. BOUND - Array Index Bound Check (80188+) . . . . . . . . . . . . . 8
  24. BSF - Bit Scan Forward (386+). . . . . . . . . . . . . . . . . . . 8
  25. BSR - Bit Scan Reverse (386+) . . . . . . . . . . . . . . . . . . 8
  26. BSWAP - Byte Swap (486+) . . . . . . . . . . . . . . . . . . 8
  27. BT - Bit Test (386+) . . . . . . . . . . . . . . . . . . 9
  28. BTC - Bit Test with Compliment (386+). . . . . . . . . . . . . . . 9
  29. BTR - Bit Test with Reset (386+) . . . . . . . . . . . . . . . . . 9
  30. BTS - Bit Test and Set (386+) . . . . . . . . . . . . . . . . . . 9
  31. CALL - Procedure Call. . . . . . . . . . . . . . . . . . . . . . . 10
  32. CBW - Convert Byte to Word . . . . . . . . . . . . . . . . . . . . 10
  33. CDQ - Convert Double to Quad (386+). . . . . . . . . . . . . . . . 10
  34. CLC - Clear Carry. . . . . . . . . . . . . . . . . . . . . . . . . 11
  35. CLD - Clear Direction Flag . . . . . . . . . . . . . . . . . . . . 11
  36. CLI - Clear Interrupt Flag (disable) . . . . . . . . . . . . . . . 11
  37. CLTS - Clear Task Switched Flag (286+ privileged). . . . . . . . . 11
  38. CMC - Complement Carry Flag. . . . . . . . . . . . . . . . . . . . 11
  39. CMP - Compare. . . . . . . . . . . . . . . . . . . . . . . . . . . 12
  40. CMPS - Compare String (Byte, Word or Doubleword) . . . . . . . . . 12
  41. CMPXCHG - Compare and Exchange . . . . . . . . . . . . . . . . . . 12
  42. CWD - Convert Word to Doubleword . . . . . . . . . . . . . . . . . 12
  43. CWDE - Convert Word to Extended Doubleword (386+). . . . . . . . . 13
  44. DAA - Decimal Adjust for Addition. . . . . . . . . . . . . . . . . 13
  45. DAS - Decimal Adjust for Subtraction . . . . . . . . . . . . . . . 13
  46. DEC - Decrement. . . . . . . . . . . . . . . . . . . . . . . . . . 13
  47. DIV - Divide . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
  48. ENTER - Make Stack Frame (80188+) . . . . . . . . . . . . . . . . 14
  49. ESC - Escape . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
  50. HLT - Halt CPU . . . . . . . . . . . . . . . . . . . . . . . . . . 14
  51. IDIV - Signed Integer Division . . . . . . . . . . . . . . . . . . 14
  52. IMUL - Signed Multiply . . . . . . . . . . . . . . . . . . . . . . 15
  53. IN - Input Byte or Word From Port. . . . . . . . . . . . . . . . . 15
  54. INC - Increment. . . . . . . . . . . . . . . . . . . . . . . . . . 16
  55. INS - Input String from Port (80188+) . . . . . . . . . . . . . . 16
  56. INT - Interrupt. . . . . . . . . . . . . . . . . . . . . . . . . . 16
  57. INTO - Interrupt on Overflow . . . . . . . . . . . . . . . . . . . 17
  58. INVD - Invalidate Cache (486+). . . . . . . . . . . . . . . . . . 17
  59. INVLPG - Invalidate Translation Look-Aside Buffer Entry (486+) . . 17
  60. IRET/IRETD - Interrupt Return. . . . . . . . . . . . . . . . . . . 17
  61. Jxx - Jump Instructions Table. . . . . . . . . . . . . . . . . . . 18
  62. JCXZ/JECXZ - Jump if Register (E)CX is Zero. . . . . . . . . . . . 18
  63. JMP - Unconditional Jump . . . . . . . . . . . . . . . . . . . . . 19
  64. LAHF - Load Register AH From Flags . . . . . . . . . . . . . . . . 19
  65. LAR - Load Access Rights (286+ protected). . . . . . . . . . . . . 19
  66. LDS - Load Pointer Using DS. . . . . . . . . . . . . . . . . . . . 20
  67. LEA - Load Effective Address . . . . . . . . . . . . . . . . . . . 20
  68. LEAVE - Restore Stack for Procedure Exit (80188+). . . . . . . . . 20
  69. LES - Load Pointer Using ES. . . . . . . . . . . . . . . . . . . . 20
  70. LFS - Load Pointer Using FS (386+) . . . . . . . . . . . . . . . . 21
  71. LGDT - Load Global Descriptor Table (286+ privileged). . . . . . . 21
  72. LIDT - Load Interrupt Descriptor Table (286+ privileged) . . . . . 21
  73. LGS - Load Pointer Using GS (386+) . . . . . . . . . . . . . . . . 21
  74. LLDT - Load Local Descriptor Table (286+ privileged) . . . . . . . 22
  75. LMSW - Load Machine Status Word (286+ privileged). . . . . . . . . 22
  76. LOCK - Lock Bus. . . . . . . . . . . . . . . . . . . . . . . . . . 22
  77. LODS - Load String (Byte, Word or Double). . . . . . . . . . . . . 22
  78. LOOP - Decrement CX and Loop if CX Not Zero. . . . . . . . . . . . 23
  79. LOOPE/LOOPZ - Loop While Equal / Loop While Zero . . . . . . . . . 23
  80. LOOPNZ/LOOPNE - Loop While Not Zero / Loop While Not Equal . . . . 23
  81. LSL - Load Segment Limit (286+ protected). . . . . . . . . . . . . 23
  82. LSS - Load Pointer Using SS (386+) . . . . . . . . . . . . . . . . 24
  83. LTR - Load Task Register (286+ privileged) . . . . . . . . . . . . 24
  84. MOV - Move Byte or Word. . . . . . . . . . . . . . . . . . . . . . 24
  85. MOVS - Move String (Byte or Word). . . . . . . . . . . . . . . . . 25
  86. MOVSX - Move with Sign Extend (386+) . . . . . . . . . . . . . . . 25
  87. MOVZX - Move with Zero Extend (386+) . . . . . . . . . . . . . . . 25
  88. MUL - Unsigned Multiply. . . . . . . . . . . . . . . . . . . . . . 25
  89. NEG - Two's Complement Negation. . . . . . . . . . . . . . . . . . 26
  90. NOP - No Operation (90h) . . . . . . . . . . . . . . . . . . . . . 26
  91. NOT - One's Compliment Negation (Logical NOT). . . . . . . . . . . 26
  92. OR - Inclusive Logical OR. . . . . . . . . . . . . . . . . . . . . 26
  93. OUT - Output Data to Port. . . . . . . . . . . . . . . . . . . . . 27
  94. OUTS - Output String to Port (80188+) . . . . . . . . . . . . . . 27
  95. POP - Pop Word off Stack . . . . . . . . . . . . . . . . . . . . . 27
  96. POPA/POPAD - Pop All Registers onto Stack (80188+). . . . . . . . 28
  97. POPF/POPFD - Pop Flags off Stack . . . . . . . . . . . . . . . . . 28
  98. PUSH - Push Word onto Stack. . . . . . . . . . . . . . . . . . . . 28
  99. PUSHA/PUSHAD - Push All Registers onto Stack (80188+) . . . . . . 28
  100. PUSHF/PUSHFD - Push Flags onto Stack . . . . . . . . . . . . . . . 29
  101. RCL - Rotate Through Carry Left. . . . . . . . . . . . . . . . . . 29
  102. RCR - Rotate Through Carry Right . . . . . . . . . . . . . . . . . 29
  103. REP - Repeat String Operation. . . . . . . . . . . . . . . . . . . 30
  104. REPE/REPZ - Repeat Equal / Repeat Zero . . . . . . . . . . . . . . 30
  105. REPNE/REPNZ - Repeat Not Equal / Repeat Not Zero . . . . . . . . . 30
  106. RET/RETF - Return From Procedure . . . . . . . . . . . . . . . . . 31
  107. ROL - Rotate Left. . . . . . . . . . . . . . . . . . . . . . . . . 31
  108. ROR - Rotate Right . . . . . . . . . . . . . . . . . . . . . . . . 31
  109. SAHF - Store AH Register into FLAGS. . . . . . . . . . . . . . . . 32
  110. SAL/SHL - Shift Arithmetic Left / Shift Logical Left . . . . . . . 32
  111. SAR - Shift Arithmetic Right . . . . . . . . . . . . . . . . . . . 32
  112. SBB - Subtract with Borrow/Carry . . . . . . . . . . . . . . . . . 33
  113. SCAS - Scan String (Byte, Word or Doubleword) . . . . . . . . . . 33
  114. SETAE/SETNB - Set if Above or Equal / Set if Not Below (386+). . . 33
  115. SETB/SETNAE - Set if Below / Set if Not Above or Equal (386+). . . 33
  116. SETBE/SETNA - Set if Below or Equal / Set if Not Above (386+). . . 34
  117. SETE/SETZ - Set if Equal / Set if Zero (386+). . . . . . . . . . . 34
  118. SETNE/SETNZ - Set if Not Equal / Set if Not Zero (386+). . . . . . 34
  119. SETL/SETNGE - Set if Less / Set if Not Greater or Equal (386+) . . 34
  120. SETGE/SETNL - Set if Greater or Equal / Set if Not Less (386+) . . 35
  121. SETLE/SETNG - Set if Less or Equal / Set if Not greater or Equal (386+) 35
  122. SETG/SETNLE - Set if Greater / Set if Not Less or Equal (386+) . . 35
  123. SETS - Set if Signed (386+). . . . . . . . . . . . . . . . . . . . 35
  124. SETNS - Set if Not Signed (386+) . . . . . . . . . . . . . . . . . 36
  125. SETC - Set if Carry (386+) . . . . . . . . . . . . . . . . . . . . 36
  126. SETNC - Set if Not Carry (386+). . . . . . . . . . . . . . . . . . 36
  127. SETO - Set if Overflow (386+). . . . . . . . . . . . . . . . . . . 36
  128. SETNO - Set if Not Overflow (386+) . . . . . . . . . . . . . . . . 36
  129. SETP/SETPE - Set if Parity / Set if Parity Even (386+). . . . . . 37
  130. SETNP/SETPO - Set if No Parity / Set if Parity Odd (386+). . . . . 37
  131. SGDT - Store Global Descriptor Table (286+ privileged) . . . . . . 37
  132. SIDT - Store Interrupt Descriptor Table (286+ privileged). . . . . 37
  133. SHL - Shift Logical Left . . . . . . . . . . . . . . . . . . . . . 37
  134. SHR - Shift Logical Right. . . . . . . . . . . . . . . . . . . . . 38
  135. SHLD/SHRD - Double Precision Shift (386+). . . . . . . . . . . . . 38
  136. SLDT - Store Local Descriptor Table (286+ privileged). . . . . . . 38
  137. SMSW - Store Machine Status Word (286+ privileged) . . . . . . . . 38
  138. STC - Set Carry. . . . . . . . . . . . . . . . . . . . . . . . . . 39
  139. STD - Set Direction Flag . . . . . . . . . . . . . . . . . . . . . 39
  140. STI - Set Interrupt Flag (Enable Interrupts). . . . . . . . . . . 39
  141. STOS - Store String (Byte, Word or Doubleword). . . . . . . . . . 39
  142. STR - Store Task Register (286+ privileged). . . . . . . . . . . . 39
  143. SUB - Subtract . . . . . . . . . . . . . . . . . . . . . . . . . . 40
  144. TEST - Test For Bit Pattern. . . . . . . . . . . . . . . . . . . . 40
  145. VERR - Verify Read (286+ protected). . . . . . . . . . . . . . . . 40
  146. VERW - Verify Write (286+ protected) . . . . . . . . . . . . . . . 40
  147. WAIT/FWAIT - Event Wait. . . . . . . . . . . . . . . . . . . . . . 41
  148. WBINVD - Write-Back and Invalidate Cache (486+). . . . . . . . . . 41
  149. XCHG - Exchange. . . . . . . . . . . . . . . . . . . . . . . . . . 41
  150. XLAT/XLATB - Translate . . . . . . . . . . . . . . . . . . . . . . 41
  151. XOR - Exclusive OR . . . . . . . . . . . . . . . . . . . . . . . . 42
  153. Intel 8086 Family Architecture
  154.  
  155. General Purpose Registers Segment Registers
  156.  
  157. AH/AL AX (EAX) Accumulator CS Code Segment
  158. BH/BL BX (EBX) Base DS Data Segment
  159. CH/CL CX (ECX) Counter SS Stack Segment
  160. DH/DL DX (EDX) Data ES Extra Segment
  161. (FS) 386 and newer
  162. (Exx) indicates 386+ 32 bit register (GS) 386 and newer
  163.  
  164.  
  165. Pointer Registers Stack Registers
  166.  
  167. SI (ESI) Source Index SP (ESP) Stack Pointer
  168. DI (EDI) Destination Index BP (EBP) Base Pointer
  169. IP Instruction Pointer
  170.  
  171. Status Registers
  172.  
  173. FLAGS Status Flags (see FLAGS)
  174.  
  175. Special Registers (386+ only)
  176.  
  177. CR0 Control Register 0 DR0 Debug Register 0
  178. CR2 Control Register 2 DR1 Debug Register 1
  179. CR3 Control Register 3 DR2 Debug Register 2
  180. DR3 Debug Register 3
  181. TR4 Test Register 4 DR6 Debug Register 6
  182. TR5 Test Register 5 DR7 Debug Register 7
  183. TR6 Test Register 6
  184. TR7 Test Register 7
  185.  
  186. Register Default Segment Valid Overrides
  187.  
  188. BP SS DS, ES, CS
  189. SI or DI DS ES, SS, CS
  190. DI strings ES None
  191. SI strings DS ES, SS, CS
  192.  
  193.  
  194. - see CPU DETECTING Instruction Timing
  195.  
  196. Instruction Clock Cycle Calculation
  197.  
  198.  
  199. Some instructions require additional clock cycles due to a "Next
  200. Instruction Component" identified by a "+m" in the instruction
  201. clock cycle listings. This is due to the prefetch queue being
  202. purge on a control transfers. Below is the general rule for
  203. calculating "m":
  204.  
  205.  
  206. 88/86 not applicable
  207. 286 "m" is the number of bytes in the next instruction
  208. 386 "m" is the number of components in the next instruction
  209. (the instruction coding (each byte), plus the data and
  210. the displacement are all considered components)
  211.  
  212.  
  213. 8088/8086 Effective Address (EA) Calculation
  214.  
  215. Description Clock Cycles
  216.  
  217. Displacement 6
  218. Base or Index (BX,BP,SI,DI) 5
  219. Displacement+(Base or Index) 9
  220. Base+Index (BP+DI,BX+SI) 7
  221. Base+Index (BP+SI,BX+DI) 8
  222. Base+Index+Displacement (BP+DI,BX+SI) 11
  223. Base+Index+Displacement (BP+SI+disp,BX+DI+disp) 12
  224.  
  225.  
  226. - add 4 cycles for word operands at odd addresses
  227. - add 2 cycles for segment override
  228. - 80188/80186 timings differ from those of the 8088/8086/80286
  229. Task State Calculation
  230.  
  231. "TS" is defined as switching from VM/486 or 80286 TSS to one of
  232. the following:
  233.  
  234. ÚÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ¿
  235. ³ New Task ³
  236. ÃÄÄÄÄÄÄÄÂÄÄÄÄÄÄÄÂÄÄÄÄÄÄÄÂÄÄÄÄÄÄÄÂÄÄÄÄÄÄÄ´
  237. ÚÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ´486 TSS³486 TSS³386 TSS³386 TSS³286 TSS³
  238. ³ Old Task ³ (VM=0)³ (VM=1)³ (VM=0)³ (VM=1)³ ³
  239. ÀÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄ´
  240. 386 TSS (VM=0) ³ ³ ³ 309 ³ 226 ³ 282 ³
  241. ÃÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄ´
  242. 386 TSS (VM=1) ³ ³ ³ 314 ³ 231 ³ 287 ³
  243. ÃÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄ´
  244. 386 CPU/286 TSS ³ ³ ³ 307 ³ 224 ³ 280 ³
  245. ÃÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄÅÄÄÄÄÄÄÄ´
  246. 486 CPU/286 TSS ³ 199 ³ 177 ³ ³ ³ 180 ³
  247. ÀÄÄÄÄÄÄÄÁÄÄÄÄÄÄÄÁÄÄÄÄÄÄÄÁÄÄÄÄÄÄÄÁÄÄÄÄÄÄÄÙ
  248.  
  249.  
  250. Miscellaneous
  251.  
  252. - all timings are for best case and do not take into account wait
  253. states, instruction alignment, the state of the prefetch queue,
  254. DMA refresh cycles, cache hits/misses or exception processing.
  255. - to convert clocks to nanoseconds divide one microsecond by the
  256. processor speed in MegaHertz:
  257.  
  258. (1000MHz/(n MHz)) = X nanoseconds
  259.  
  260. - see 8086 Architecture
  261.  
  262.  
  263. FLAGS - Intel 8086 Family Flags Register
  264.  
  265. ³11³10³F³E³D³C³B³A³9³8³7³6³5³4³3³2³1³0³
  266. ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ÀÄÄÄ CF Carry Flag
  267. ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ÀÄÄÄ 1
  268. ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ÀÄÄÄ PF Parity Flag
  269. ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ÀÄÄÄ 0
  270. ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ÀÄÄÄ AF Auxiliary Flag
  271. ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ÀÄÄÄ 0
  272. ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ÀÄÄÄ ZF Zero Flag
  273. ³ ³ ³ ³ ³ ³ ³ ³ ³ ³ ÀÄÄÄ SF Sign Flag
  274. ³ ³ ³ ³ ³ ³ ³ ³ ³ ÀÄÄÄ TF Trap Flag (Single Step)
  275. ³ ³ ³ ³ ³ ³ ³ ³ ÀÄÄÄ IF Interrupt Flag
  276. ³ ³ ³ ³ ³ ³ ³ ÀÄÄÄ DF Direction Flag
  277. ³ ³ ³ ³ ³ ³ ÀÄÄÄ OF Overflow flag
  278. ³ ³ ³ ³ ÀÄÁÄÄÄ IOPL I/O Privilege Level (286+ only)
  279. ³ ³ ³ ÀÄÄÄÄÄ NT Nested Task Flag (286+ only)
  280. ³ ³ ÀÄÄÄÄÄ 0
  281. ³ ÀÄÄÄÄÄ RF Resume Flag (386+ only)
  282. ÀÄÄÄÄÄÄ VM Virtual Mode Flag (386+ only)
  283.  
  284. - see PUSHF POPF STI CLI STD CLD
  285. MSW - Machine Status Word (286+ only)
  286.  
  287.  
  288. ³31³30-5³4³3³2³1³0³ Machine Status Word
  289. ³ ³ ³ ³ ³ ³ ÀÄÄÄÄ Protection Enable (PE)
  290. ³ ³ ³ ³ ³ ÀÄÄÄÄÄ Math Present (MP)
  291. ³ ³ ³ ³ ÀÄÄÄÄÄÄ Emulation (EM)
  292. ³ ³ ³ ÀÄÄÄÄÄÄÄ Task Switched (TS)
  293. ³ ³ ÀÄÄÄÄÄÄÄÄ Extension Type (ET)
  294. ³ ÀÄÄÄÄÄÄÄÄÄÄ Reserved
  295. ÀÄÄÄÄÄÄÄÄÄÄÄÄÄ Paging (PG)
  296.  
  297.  
  298. Bit 0 PE Protection Enable, switches processor between
  299. protected and real mode
  300. Bit 1 MP Math Present, controls function of the WAIT
  301. instruction
  302. Bit 2 EM Emulation, indicates whether coprocessor functions
  303. are to be emulated
  304. Bit 3 TS Task Switched, set and interrogated by coprocessor
  305. on task switches and when interpretting coprocessor
  306. instructions
  307. Bit 4 ET Extension Type, indicates type of coprocessor in
  308. system
  309. Bits 5-30 Reserved
  310. bit 31 PG Paging, indicates whether the processor uses page
  311. tables to translate linear addresses to physical
  312. addresses
  313.  
  314. - see SMSW LMSW
  315. 8086/80186/80286/80386/80486 Instruction Set
  316.  
  317. AAA - Ascii Adjust for Addition
  318.  
  319. Usage: AAA
  320. Modifies flags: AF CF (OF,PF,SF,ZF undefined)
  321.  
  322. Changes contents of AL to valid unpacked decimal. The high order
  323. nibble is zeroed.
  324.  
  325. Clocks Size
  326. Operands 808x 286 386 486 Bytes
  327.  
  328. none 8 3 4 3 1
  329.  
  330.  
  331. AAD - Ascii Adjust for Division
  332.  
  333. Usage: AAD
  334. Modifies flags: SF ZF PF (AF,CF,OF undefined)
  335.  
  336. Used before dividing unpacked decimal numbers. Multiplies AH by
  337. 10 and the adds result into AL. Sets AH to zero. This instruction
  338. is also known to have an undocumented behavior.
  339.  
  340. AL := 10*AH+AL
  341. AH := 0
  342.  
  343. Clocks Size
  344. Operands 808x 286 386 486 Bytes
  345.  
  346. none 60 14 19 14 2
  347.  
  348.  
  349. AAM - Ascii Adjust for Multiplication
  350.  
  351.  
  352. Usage: AAM
  353. Modifies flags: PF SF ZF (AF,CF,OF undefined)
  354.  
  355. AH := AL / 10
  356. AL := AL mod 10
  357.  
  358. Used after multiplication of two unpacked decimal numbers, this
  359. instruction adjusts an unpacked decimal number. The high order
  360. nibble of each byte must be zeroed before using this instruction.
  361. This instruction is also known to have an undocumented behavior.
  362.  
  363. Clocks Size
  364. Operands 808x 286 386 486 Bytes
  365.  
  366. none 83 16 17 15 2
  367.  
  368.  
  369. AAS - Ascii Adjust for Subtraction
  370.  
  371. Usage: AAS
  372. Modifies flags: AF CF (OF,PF,SF,ZF undefined)
  373.  
  374. Corrects result of a previous unpacked decimal subtraction in AL.
  375. High order nibble is zeroed.
  376.  
  377. Clocks Size
  378. Operands 808x 286 386 486 Bytes
  379.  
  380. none 8 3 4 3 1
  381. ADC - Add With Carry
  382.  
  383. Usage: ADC dest,src
  384. Modifies flags: AF CF OF SF PF ZF
  385.  
  386. Sums two binary operands placing the result in the destination.
  387. If CF is set, a 1 is added to the destination.
  388.  
  389. Clocks Size
  390. Operands 808x 286 386 486 Bytes
  391.  
  392. reg,reg 3 2 2 1 2
  393. mem,reg 16+EA 7 7 3 2-4 (W88=24+EA)
  394. reg,mem 9+EA 7 6 2 2-4 (W88=13+EA)
  395. reg,immed 4 3 2 1 3-4
  396. mem,immed 17+EA 7 7 3 3-6 (W88=23+EA)
  397. accum,immed 4 3 2 1 2-3
  398.  
  399.  
  400. ADD - Arithmetic Addition
  401.  
  402. Usage: ADD dest,src
  403. Modifies flags: AF CF OF PF SF ZF
  404.  
  405. Adds "src" to "dest" and replacing the original contents of "dest".
  406. Both operands are binary.
  407.  
  408. Clocks Size
  409. Operands 808x 286 386 486 Bytes
  410.  
  411. reg,reg 3 2 2 1 2
  412. mem,reg 16+EA 7 7 3 2-4 (W88=24+EA)
  413. reg,mem 9+EA 7 6 2 2-4 (W88=13+EA)
  414. reg,immed 4 3 2 1 3-4
  415. mem,immed 17+EA 7 7 3 3-6 (W88=23+EA)
  416. accum,immed 4 3 2 1 2-3
  417.  
  418.  
  419. AND - Logical And
  420.  
  421. Usage: AND dest,src
  422. Modifies flags: CF OF PF SF ZF (AF undefined)
  423.  
  424. Performs a logical AND of the two operands replacing the destination
  425. with the result.
  426.  
  427. Clocks Size
  428. Operands 808x 286 386 486 Bytes
  429.  
  430. reg,reg 3 2 2 1 2
  431. mem,reg 16+EA 7 7 3 2-4 (W88=24+EA)
  432. reg,mem 9+EA 7 6 1 2-4 (W88=13+EA)
  433. reg,immed 4 3 2 1 3-4
  434. mem,immed 17+EA 7 7 3 3-6 (W88=23+EA)
  435. accum,immed 4 3 2 1 2-3
  436.  
  437.  
  438. ARPL - Adjusted Requested Privilege Level of Selector (286+ PM)
  439.  
  440. Usage: ARPL dest,src
  441. (286+ protected mode)
  442. Modifies flags: ZF
  443.  
  444. Compares the RPL bits of "dest" against "src". If the RPL bits
  445. of "dest" are less than "src", the destination RPL bits are set
  446. equal to the source RPL bits and the Zero Flag is set. Otherwise
  447. the Zero Flag is cleared.
  448.  
  449. Clocks Size
  450. Operands 808x 286 386 486 Bytes
  451.  
  452. reg,reg - 10 20 9 2
  453. mem,reg - 11 21 9 4
  454. BOUND - Array Index Bound Check (80188+)
  455.  
  456. Usage: BOUND src,limit
  457. Modifies flags: None
  458.  
  459. Array index in source register is checked against upper and lower
  460. bounds in memory source. The first word located at "limit" is
  461. the lower boundary and the word at "limit+2" is the upper array bound.
  462. Interrupt 5 occurs if the source value is less than or higher than
  463. the source.
  464.  
  465. Clocks Size
  466. Operands 808x 286 386 486 Bytes
  467.  
  468. reg16,mem32 - nj=13 nj=10 7 2
  469. reg32,mem64 - nj=13 nj=10 7 2
  470.  
  471. - nj = no jump taken
  472.  
  473.  
  474. BSF - Bit Scan Forward (386+)
  475.  
  476. Usage: BSF dest,src
  477. Modifies flags: ZF
  478.  
  479. Scans source operand for first bit set. Sets ZF if a bit is found
  480. set and loads the destination with an index to first set bit. Clears
  481. ZF is no bits are found set. BSF scans forward across bit pattern
  482. (0-n) while BSR scans in reverse (n-0).
  483.  
  484. Clocks Size
  485. Operands 808x 286 386 486 Bytes
  486.  
  487. reg,reg - - 10+3n 6-42 3
  488. reg,mem - - 10+3n 7-43 3-7
  489. reg32,reg32 - - 10+3n 6-42 3-7
  490. reg32,mem32 - - 10+3n 7-43 3-7
  491.  
  492.  
  493. BSR - Bit Scan Reverse (386+)
  494.  
  495. Usage: BSR dest,src
  496. Modifies flags: ZF
  497.  
  498. Scans source operand for first bit set. Sets ZF if a bit is found
  499. set and loads the destination with an index to first set bit. Clears
  500. ZF is no bits are found set. BSF scans forward across bit pattern
  501. (0-n) while BSR scans in reverse (n-0).
  502.  
  503. Clocks Size
  504. Operands 808x 286 386 486 Bytes
  505.  
  506. reg,reg - - 10+3n 6-103 3
  507. reg,mem - - 10+3n 7-104 3-7
  508. reg32,reg32 - - 10+3n 6-103 3-7
  509. reg32,mem32 - - 10+3n 7-104 3-7
  510.  
  511.  
  512. BSWAP - Byte Swap (486+)
  513.  
  514. Usage: BSWAP reg32
  515. Modifies flags: none
  516.  
  517. Changes the byte order of a 32 bit register from big endian to
  518. little endian or vice versa. Result left in destination register
  519. is undefined if the operand is a 16 bit register.
  520.  
  521. Clocks Size
  522. Operands 808x 286 386 486 Bytes
  523.  
  524. reg32 - - - 1 2
  525. BT - Bit Test (386+)
  526.  
  527. Usage: BT dest,src
  528. Modifies flags: CF
  529.  
  530. The destination bit indexed by the source value is copied into the
  531. Carry Flag.
  532.  
  533. Clocks Size
  534. Operands 808x 286 386 486 Bytes
  535.  
  536. reg16,immed8 - - 3 3 4-8
  537. mem16,immed8 - - 6 6 4-8
  538. reg16,reg16 - - 3 3 3-7
  539. mem16,reg16 - - 12 12 3-7
  540.  
  541.  
  542. BTC - Bit Test with Compliment (386+)
  543.  
  544. Usage: BTC dest,src
  545. Modifies flags: CF
  546.  
  547. The destination bit indexed by the source value is copied into the
  548. Carry Flag after being complimented (inverted).
  549.  
  550. Clocks Size
  551. Operands 808x 286 386 486 Bytes
  552.  
  553. reg16,immed8 - - 6 6 4-8
  554. mem16,immed8 - - 8 8 4-8
  555. reg16,reg16 - - 6 6 3-7
  556. mem16,reg16 - - 13 13 3-7
  557.  
  558.  
  559. BTR - Bit Test with Reset (386+)
  560.  
  561. Usage: BTR dest,src
  562. Modifies flags: CF
  563.  
  564. The destination bit indexed by the source value is copied into the
  565. Carry Flag and then cleared in the destination.
  566.  
  567. Clocks Size
  568. Operands 808x 286 386 486 Bytes
  569.  
  570. reg16,immed8 - - 6 6 4-8
  571. mem16,immed8 - - 8 8 4-8
  572. reg16,reg16 - - 6 6 3-7
  573. mem16,reg16 - - 13 13 3-7
  574.  
  575.  
  576. BTS - Bit Test and Set (386+)
  577.  
  578. Usage: BTS dest,src
  579. Modifies flags: CF
  580.  
  581. The destination bit indexed by the source value is copied into the
  582. Carry Flag and then set in the destination.
  583.  
  584. Clocks Size
  585. Operands 808x 286 386 486 Bytes
  586.  
  587. reg16,immed8 - - 6 6 4-8
  588. mem16,immed8 - - 8 8 4-8
  589. reg16,reg16 - - 6 6 3-7
  590. mem16,reg16 - - 13 13 3-7
  591. CALL - Procedure Call
  592.  
  593. Usage: CALL destination
  594. Modifies flags: None
  595.  
  596. Pushes Instruction Pointer (and Code Segment for far calls) onto
  597. stack and loads Instruction Pointer with the address of proc-name.
  598. Code continues with execution at CS:IP.
  599.  
  600. Clocks
  601. Operands 808x 286 386 486
  602.  
  603. rel16 (near, IP relative) 19 7 7+m 3
  604. rel32 (near, IP relative) - - 7+m 3
  605.  
  606. reg16 (near, register indirect) 16 7 7+m 5
  607. reg32 (near, register indirect) - - 7+m 5
  608.  
  609. mem16 (near, memory indirect) - 21+EA 11 10+m 5
  610. mem32 (near, memory indirect) - - 10+m 5
  611.  
  612. ptr16:16 (far, full ptr supplied) 28 13 17+m 18
  613. ptr16:32 (far, full ptr supplied) - - 17+m 18
  614. ptr16:16 (far, ptr supplied, prot. mode) - 26 34+m 20
  615. ptr16:32 (far, ptr supplied, prot. mode) - - 34+m 20
  616. m16:16 (far, indirect) 37+EA 16 22+m 17
  617. m16:32 (far, indirect) - - 22+m 17
  618. m16:16 (far, indirect, prot. mode) - 29 38+m 20
  619. m16:32 (far, indirect, prot. mode) - - 38+m 20
  620.  
  621. ptr16:16 (task, via TSS or task gate) - 177 TS 37+TS
  622. m16:16 (task, via TSS or task gate) - 180/185 5+TS 37+TS
  623. m16:32 (task) - - TS 37+TS
  624. m16:32 (task) - - 5+TS 37+TS
  625.  
  626. ptr16:16 (gate, same privilege) - 41 52+m 35
  627. ptr16:32 (gate, same privilege) - - 52+m 35
  628. m16:16 (gate, same privilege) - 44 56+m 35
  629. m16:32 (gate, same privilege) - - 56+m 35
  630.  
  631. ptr16:16 (gate, more priv, no parm) - 82 86+m 69
  632. ptr16:32 (gate, more priv, no parm) - - 86+m 69
  633. m16:16 (gate, more priv, no parm) - 83 90+m 69
  634. m16:32 (gate, more priv, no parm) - - 90+m 69
  635.  
  636. ptr16:16 (gate, more priv, x parms) - 86+4x 94+4x+m 77+4x
  637. ptr16:32 (gate, more priv, x parms) - - 94+4x+m 77+4x
  638. m16:16 (gate, more priv, x parms) - 90+4x 98+4x+m 77+4x
  639. m16:32 (gate, more priv, x parms) - - 98+4x+m 77+4x
  640.  
  641.  
  642. CBW - Convert Byte to Word
  643.  
  644. Usage: CBW
  645. Modifies flags: None
  646.  
  647. Converts byte in AL to word Value in AX by extending sign of AL
  648. throughout register AH.
  649.  
  650. Clocks Size
  651. Operands 808x 286 386 486 Bytes
  652.  
  653. none 2 2 3 3 1
  654.  
  655.  
  656. CDQ - Convert Double to Quad (386+)
  657.  
  658. Usage: CDQ
  659. Modifies flags: None
  660.  
  661. Converts signed DWORD in EAX to a signed quad word in EDX:EAX by
  662. extending the high order bit of EAX throughout EDX
  663.  
  664. Clocks Size
  665. Operands 808x 286 386 486 Bytes
  666.  
  667. none - - 2 3 1
  668. CLC - Clear Carry
  669.  
  670. Usage: CLC
  671. Modifies flags: CF
  672.  
  673. Clears the Carry Flag.
  674.  
  675. Clocks Size
  676. Operands 808x 286 386 486 Bytes
  677.  
  678. none 2 2 2 2 1
  679.  
  680.  
  681. CLD - Clear Direction Flag
  682.  
  683. Usage: CLD
  684. Modifies flags: DF
  685.  
  686. Clears the Direction Flag causing string instructions to increment
  687. the SI and DI index registers.
  688.  
  689. Clocks Size
  690. Operands 808x 286 386 486 Bytes
  691.  
  692. none 2 2 2 2 1
  693.  
  694.  
  695. CLI - Clear Interrupt Flag (disable)
  696.  
  697. Usage: CLI
  698. Modifies flags: IF
  699.  
  700. Disables the maskable hardware interrupts by clearing the Interrupt
  701. flag. NMI's and software interrupts are not inhibited.
  702.  
  703. Clocks Size
  704. Operands 808x 286 386 486 Bytes
  705.  
  706. none 2 2 3 5 1
  707.  
  708.  
  709. CLTS - Clear Task Switched Flag (286+ privileged)
  710.  
  711. Usage: CLTS
  712. Modifies flags: None
  713.  
  714. Clears the Task Switched Flag in the Machine Status Register. This
  715. is a privileged operation and is generally used only by operating
  716. system code.
  717.  
  718. Clocks Size
  719. Operands 808x 286 386 486 Bytes
  720.  
  721. none - 2 5 7 2
  722.  
  723.  
  724. CMC - Complement Carry Flag
  725.  
  726. Usage: CMC
  727. Modifies flags: CF
  728.  
  729. Toggles (inverts) the Carry Flag
  730.  
  731. Clocks Size
  732. Operands 808x 286 386 486 Bytes
  733.  
  734. none 2 2 2 2 1
  735. CMP - Compare
  736.  
  737. Usage: CMP dest,src
  738. Modifies flags: AF CF OF PF SF ZF
  739.  
  740. Subtracts source from destination and updates the flags but does
  741. not save result. Flags can subsequently be checked for conditions.
  742.  
  743. Clocks Size
  744. Operands 808x 286 386 486 Bytes
  745.  
  746. reg,reg 3 2 2 1 2
  747. mem,reg 9+EA 7 5 2 2-4 (W88=13+EA)
  748. reg,mem 9+EA 6 6 2 2-4 (W88=13+EA)
  749. reg,immed 4 3 2 1 3-4
  750. mem,immed 10+EA 6 5 2 3-6 (W88=14+EA)
  751. accum,immed 4 3 2 1 2-3
  752.  
  753.  
  754. CMPS - Compare String (Byte, Word or Doubleword)
  755.  
  756. Usage: CMPS dest,src
  757. CMPSB
  758. CMPSW
  759. CMPSD (386+)
  760. Modifies flags: AF CF OF PF SF ZF
  761.  
  762. Subtracts destination value from source without saving results.
  763. Updates flags based on the subtraction and the index registers
  764. (E)SI and (E)DI are incremented or decremented depending on the
  765. state of the Direction Flag. CMPSB inc/decrements the index
  766. registers by 1, CMPSW inc/decrements by 2, while CMPSD increments
  767. or decrements by 4. The REP prefixes can be used to process
  768. entire data items.
  769.  
  770. Clocks Size
  771. Operands 808x 286 386 486 Bytes
  772.  
  773. dest,src 22 8 10 8 1 (W88=30)
  774.  
  775.  
  776. CMPXCHG - Compare and Exchange
  777.  
  778. Usage: CMPXCHG dest,src (486+)
  779. Modifies flags: AF CF OF PF SF ZF
  780.  
  781. Compares the accumulator (8-32 bits) with "dest". If equal the
  782. "dest" is loaded with "src", otherwise the accumulator is loaded
  783. with "dest".
  784.  
  785. Clocks Size
  786. Operands 808x 286 386 486 Bytes
  787.  
  788. reg,reg - - - 6 2
  789. mem,reg - - - 7 2
  790.  
  791. - add 3 clocks if the "mem,reg" comparison fails
  792.  
  793.  
  794. CWD - Convert Word to Doubleword
  795.  
  796. Usage: CWD
  797. Modifies flags: None
  798.  
  799. Extends sign of word in register AX throughout register DX forming
  800. a doubleword quantity in DX:AX.
  801.  
  802. Clocks Size
  803. Operands 808x 286 386 486 Bytes
  804.  
  805. none 5 2 2 3 1
  806. CWDE - Convert Word to Extended Doubleword (386+)
  807.  
  808. Usage: CWDE
  809. Modifies flags: None
  810.  
  811. Converts a signed word in AX to a signed doubleword in EAX by
  812. extending the sign bit of AX throughout EAX.
  813.  
  814. Clocks Size
  815. Operands 808x 286 386 486 Bytes
  816.  
  817. none - - 3 3 1
  818.  
  819.  
  820. DAA - Decimal Adjust for Addition
  821.  
  822. Usage: DAA
  823. Modifies flags: AF CF PF SF ZF (OF undefined)
  824.  
  825. Corrects result (in AL) of a previous BCD addition operation.
  826. Contents of AL are changed to a pair of packed decimal digits.
  827.  
  828. Clocks Size
  829. Operands 808x 286 386 486 Bytes
  830.  
  831. none 4 3 4 2 1
  832.  
  833.  
  834. DAS - Decimal Adjust for Subtraction
  835.  
  836. Usage: DAS
  837. Modifies flags: AF CF PF SF ZF (OF undefined)
  838.  
  839. Corrects result (in AL) of a previous BCD subtraction operation.
  840. Contents of AL are changed to a pair of packed decimal digits.
  841.  
  842. Clocks Size
  843. Operands 808x 286 386 486 Bytes
  844.  
  845. none 4 3 4 2 1
  846.  
  847.  
  848. DEC - Decrement
  849.  
  850. Usage: DEC dest
  851. Modifies flags: AF OF PF SF ZF
  852.  
  853. Unsigned binary subtraction of one from the destination.
  854.  
  855. Clocks Size
  856. Operands 808x 286 386 486 Bytes
  857.  
  858. reg8 3 2 2 1 2
  859. mem 15+EA 7 6 3 2-4
  860. reg16/32 3 2 2 1 1
  861.  
  862.  
  863. DIV - Divide
  864.  
  865. Usage: DIV src
  866. Modifies flags: (AF,CF,OF,PF,SF,ZF undefined)
  867.  
  868. Unsigned binary division of accumulator by source. If the source
  869. divisor is a byte value then AX is divided by "src" and the quotient
  870. is placed in AL and the remainder in AH. If source operand is a word
  871. value, then DX:AX is divided by "src" and the quotient is stored in AX
  872. and the remainder in DX.
  873.  
  874. Clocks Size
  875. Operands 808x 286 386 486 Bytes
  876.  
  877. reg8 80-90 14 14 16 2
  878. reg16 144-162 22 22 24 2
  879. reg32 - - 38 40 2
  880. mem8 (86-96)+EA 17 17 16 2-4
  881. mem16 (150-168)+EA 25 25 24 2-4 (W88=158-176+EA)
  882. mem32 - - 41 40 2-4
  883. ENTER - Make Stack Frame (80188+)
  884.  
  885. Usage: ENTER locals,level
  886. Modifies flags: None
  887.  
  888. Modifies stack for entry to procedure for high level language.
  889. Operand "locals" specifies the amount of storage to be allocated
  890. on the stack. "Level" specifies the nesting level of the routine.
  891. Paired with the LEAVE instruction, this is an efficient method of
  892. entry and exit to procedures.
  893.  
  894. Clocks Size
  895. Operands 808x 286 386 486 Bytes
  896.  
  897. immed16,0 - 11 10 14 4
  898. immed16,1 - 15 12 17 4
  899. immed16,immed8 - 12+4(n-1) 15+4(n-1) 17+3n 4
  900.  
  901.  
  902. ESC - Escape
  903.  
  904. Usage: ESC immed,src
  905. Modifies flags: None
  906.  
  907. Provides access to the data bus for other resident processors.
  908. The CPU treats it as a NOP but places memory operand on bus.
  909.  
  910. Clocks Size
  911. Operands 808x 286 386 486 Bytes
  912.  
  913. immed,reg 2 9-20 ? 2
  914. immed,mem 2 9-20 ? 2-4
  915.  
  916.  
  917. HLT - Halt CPU
  918.  
  919. Usage: HLT
  920. Modifies flags: None
  921.  
  922. Halts CPU until RESET line is activated, NMI or maskable interrupt
  923. received. The CPU becomes dormant but retains the current CS:IP
  924. for later restart.
  925.  
  926. Clocks Size
  927. Operands 808x 286 386 486 Bytes
  928.  
  929. none 2 2 5 4 1
  930.  
  931.  
  932. IDIV - Signed Integer Division
  933.  
  934. Usage: IDIV src
  935. Modifies flags: (AF,CF,OF,PF,SF,ZF undefined)
  936.  
  937. Signed binary division of accumulator by source. If source is a
  938. byte value, AX is divided by "src" and the quotient is stored in
  939. AL and the remainder in AH. If source is a word value, DX:AX is
  940. divided by "src", and the quotient is stored in AL and the
  941. remainder in DX.
  942. Clocks Size
  943. Operands 808x 286 386 486 Bytes
  944.  
  945. reg8 101-112 17 19 19 2
  946. reg16 165-184 25 27 27 2
  947. reg32 - - 43 43 2
  948. mem8 (107-118)+EA 20 22 20 2-4
  949. mem16 (171-190)+EA 38 30 28 2-4 (W88=175-194)
  950. mem32 - - 46 44 2-4
  951. IMUL - Signed Multiply
  952.  
  953. Usage: IMUL src
  954. IMUL src,immed (286+)
  955. IMUL dest,src,immed8 (286+)
  956. IMUL dest,src (386+)
  957. Modifies flags: CF OF (AF,PF,SF,ZF undefined)
  958.  
  959. Signed multiplication of accumulator by "src" with result placed
  960. in the accumulator. If the source operand is a byte value, it
  961. is multiplied by AL and the result stored in AX. If the source
  962. operand is a word value it is multiplied by AX and the result is
  963. stored in DX:AX. Other variations of this instruction allow
  964. specification of source and destination registers as well as a
  965. third immediate factor.
  966.  
  967. Clocks Size
  968. Operands 808x 286 386 486 Bytes
  969.  
  970. reg8 80-98 13 9-14 13-18 2
  971. reg16 128-154 21 9-22 13-26 2
  972. reg32 - - 9-38 12-42 2
  973. mem8 86-104 16 12-17 13-18 2-4
  974. mem16 134-160 24 12-25 13-26 2-4
  975. mem32 - - 12-41 13-42 2-4
  976. reg16,reg16 - - 9-22 13-26 3-5
  977. reg32,reg32 - - 9-38 13-42 3-5
  978. reg16,mem16 - - 12-25 13-26 3-5
  979. reg32,mem32 - - 12-41 13-42 3-5
  980. reg16,immed - 21 9-22 13-26 3
  981. reg32,immed - 21 9-38 13-42 3-6
  982. reg16,reg16,immed - 2 9-22 13-26 3-6
  983. reg32,reg32,immed - 21 9-38 13-42 3-6
  984. reg16,mem16,immed - 24 12-25 13-26 3-6
  985. reg32,mem32,immed - 24 12-41 13-42 3-6
  986.  
  987.  
  988. IN - Input Byte or Word From Port
  989.  
  990. Usage: IN accum,port
  991. Modifies flags: None
  992.  
  993. A byte, word or dword is read from "port" and placed in AL, AX or
  994. EAX respectively. If the port number is in the range of 0-255
  995. it can be specified as an immediate, otherwise the port number
  996. must be specified in DX. Valid port ranges on the PC are 0-1024,
  997. though values through 65535 may be specified and recognized by
  998. third party vendors and PS/2's.
  999.  
  1000. Clocks Size
  1001. Operands 808x 286 386 486 Bytes
  1002.  
  1003. accum,immed8 10/14 5 12 14 2
  1004. accum,immed8 (PM) 6/26 8/28/27 2
  1005. accum,DX 8/12 5 13 14 1
  1006. accum,DX (PM) 7/27 8/28/27 1
  1007.  
  1008. - 386+ protected mode timings depend on privilege levels.
  1009.  
  1010. first number is the timing if: CPL ó IOPL
  1011. second number is the timing if: CPL > IOPL or in VM 86 mode (386)
  1012. CPL ò IOPL (486)
  1013. third number is the timing when: virtual mode on 486 processor
  1014. - 486 virtual mode always requires 27 cycles
  1015. INC - Increment
  1016.  
  1017. Usage: INC dest
  1018. Modifies flags: AF OF PF SF ZF
  1019.  
  1020. Adds one to destination unsigned binary operand.
  1021.  
  1022. Clocks Size
  1023. Operands 808x 286 386 486 Bytes
  1024.  
  1025. reg8 3 2 2 1 2
  1026. reg16 3 2 2 1 1
  1027. reg32 3 2 2 1 1
  1028. mem 15+EA 7 6 3 2-4 (W88=23+EA)
  1029.  
  1030.  
  1031. INS - Input String from Port (80188+)
  1032.  
  1033. Usage: INS dest,port
  1034. INSB
  1035. INSW
  1036. INSD (386+)
  1037. Modifies flags: None
  1038.  
  1039. Loads data from port to the destination ES:(E)DI (even if a
  1040. destination operand is supplied). (E)DI is adjusted by the size
  1041. of the operand and increased if the Direction Flag is cleared and
  1042. decreased if the Direction Flag is set. For INSB, INSW, INSD no
  1043. operands are allowed and the size is determined by the mnemonic.
  1044.  
  1045. Clocks Size
  1046. Operands 808x 286 386 486 Bytes
  1047.  
  1048. dest,port - 5 15 17 1
  1049. dest,port (PM) - 5 9/29 10/32/30 1
  1050. none - 5 15 17 1
  1051. none (PM) - 5 9/29 10/32/30 1
  1052.  
  1053. - 386+ protected mode timings depend on privilege levels.
  1054.  
  1055. first number is the timing if: CPL ó IOPL
  1056. second number is the timing if: CPL > IOPL
  1057. third number is the timing if: virtual mode on 486 processor
  1058.  
  1059.  
  1060. INT - Interrupt
  1061.  
  1062. Usage: INT num
  1063. Modifies flags: TF IF
  1064.  
  1065. Initiates a software interrupt by pushing the flags, clearing the
  1066. Trap and Interrupt Flags, pushing CS followed by IP and loading
  1067. CS:IP with the value found in the interrupt vector table. Execution
  1068. then begins at the location addressed by the new CS:IP
  1069.  
  1070. Clocks Size
  1071. Operands 808x 286 386 486 Bytes
  1072.  
  1073. 3 (constant) 52/72 23+m 33 26 2
  1074. 3 (prot. mode, same priv.) - 40+m 59 44 2
  1075. 3 (prot. mode, more priv.) - 78+m 99 71 2
  1076. 3 (from VM86 to PL 0) - - 119 82 2
  1077. 3 (prot. mode via task gate) - 167+m TS 37+TS 2
  1078. immed8 51/71 23+m 37 30 1
  1079. immed8 (prot. mode, same priv.) - 40+m 59 44 1
  1080. immed8 (prot. mode, more priv.) - 78+m 99 71 1
  1081. immed8 (from VM86 to PL 0) - - 119 86 1
  1082. immed8 (prot. mode, via task gate) - 167+m TS 37+TS 1
  1083. INTO - Interrupt on Overflow
  1084.  
  1085. Usage: INTO
  1086. Modifies flags: IF TF
  1087.  
  1088. If the Overflow Flag is set this instruction generates an INT 4
  1089. which causes the code addressed by 0000:0010 to be executed.
  1090.  
  1091. Clocks Size
  1092. Operands 808x 286 386 486 Bytes
  1093.  
  1094. none: jump 53/73 24+m 35 28 1
  1095. no jump 4 3 3 3
  1096. (prot. mode, same priv.) - - 59 46 1
  1097. (prot. mode, more priv.) - - 99 73 1
  1098. (from VM86 to PL 0) - - 119 84 1
  1099. (prot. mode, via task gate) - TS 39+TS 1
  1100.  
  1101.  
  1102. INVD - Invalidate Cache (486+)
  1103.  
  1104. Usage: INVD
  1105. Modifies flags: none
  1106.  
  1107. Flushes CPU internal cache. Issues special function bus cycle
  1108. which indicates to flush external caches. Data in write-back
  1109. external caches is lost.
  1110.  
  1111. Clocks Size
  1112. Operands 808x 286 386 486 Bytes
  1113.  
  1114. none - - - 4 2
  1115.  
  1116.  
  1117. INVLPG - Invalidate Translation Look-Aside Buffer Entry (486+)
  1118.  
  1119. Usage: INVLPG
  1120. Modifies flags: none
  1121.  
  1122. Invalidates a single page table entry in the Translation
  1123. Look-Aside Buffer. Intel warns that this instruction may be
  1124. implemented differently on future processors.
  1125.  
  1126. Clocks Size
  1127. Operands 808x 286 386 486 Bytes
  1128.  
  1129. none - - - 12 2
  1130.  
  1131. - timing is for TLB entry hit only.
  1132.  
  1133.  
  1134. IRET/IRETD - Interrupt Return
  1135.  
  1136. Usage: IRET
  1137. IRETD (386+)
  1138. Modifies flags: AF CF DF IF PF SF TF ZF
  1139.  
  1140. Returns control to point of interruption by popping IP, CS
  1141. and then the Flags from the stack and continues execution at
  1142. this location. CPU exception interrupts will return to the
  1143. instruction that cause the exception because the CS:IP placed
  1144. on the stack during the interrupt is the address of the offending
  1145. instruction.
  1146.  
  1147. Clocks Size
  1148. Operands 808x 286 386 486 Bytes
  1149.  
  1150. iret 32/44 17+m 22 15 1
  1151. iret (prot. mode) - 31+m 38 15 1
  1152. iret (to less privilege) - 55+m 82 36 1
  1153. iret (different task, NT=1) - 169+m TS TS+32 1
  1154. iretd - - 22/38 15 1
  1155. iretd (to less privilege) - - 82 36 1
  1156. iretd (to VM86 mode) - - 60 15 1
  1157. iretd (different task, NT=1) - - TS TS+32 1
  1158.  
  1159. - 386 timings are listed as real-mode/protected-mode
  1160. Jxx - Jump Instructions Table
  1161.  
  1162. Mnemonic Meaning Jump Condition
  1163.  
  1164. JA Jump if Above CF=0 and ZF=0
  1165. JAE Jump if Above or Equal CF=0
  1166. JB Jump if Below CF=1
  1167. JBE Jump if Below or Equal CF=1 or ZF=1
  1168. JC Jump if Carry CF=1
  1169. JCXZ Jump if CX Zero CX=0
  1170. JE Jump if Equal ZF=1
  1171. JG Jump if Greater (signed) ZF=0 and SF=OF
  1172. JGE Jump if Greater or Equal (signed) SF=OF
  1173. JL Jump if Less (signed) SF != OF
  1174. JLE Jump if Less or Equal (signed) ZF=1 or SF != OF
  1175. JMP Unconditional Jump unconditional
  1176. JNA Jump if Not Above CF=1 or ZF=1
  1177. JNAE Jump if Not Above or Equal CF=1
  1178. JNB Jump if Not Below CF=0
  1179. JNBE Jump if Not Below or Equal CF=0 and ZF=0
  1180. JNC Jump if Not Carry CF=0
  1181. JNE Jump if Not Equal ZF=0
  1182. JNG Jump if Not Greater (signed) ZF=1 or SF != OF
  1183. JNGE Jump if Not Greater or Equal (signed) SF != OF
  1184. JNL Jump if Not Less (signed) SF=OF
  1185. JNLE Jump if Not Less or Equal (signed) ZF=0 and SF=OF
  1186. JNO Jump if Not Overflow (signed) OF=0
  1187. JNP Jump if No Parity PF=0
  1188. JNS Jump if Not Signed (signed) SF=0
  1189. JNZ Jump if Not Zero ZF=0
  1190. JO Jump if Overflow (signed) OF=1
  1191. JP Jump if Parity PF=1
  1192. JPE Jump if Parity Even PF=1
  1193. JPO Jump if Parity Odd PF=0
  1194. JS Jump if Signed (signed) SF=1
  1195. JZ Jump if Zero ZF=1
  1196.  
  1197. Clocks Size
  1198. Operands 808x 286 386 486 Bytes
  1199.  
  1200. Jx: jump 16 7+m 7+m 3 2
  1201. no jump 4 3 3 1
  1202. Jx near-label - - 7+m 3 4
  1203. no jump - - 3 1
  1204.  
  1205. - It's a good programming practice to organize code so the
  1206. expected case is executed without a jump since the actual
  1207. jump takes longer to execute than falling through the test.
  1208. - see JCXZ and JMP for their respective timings
  1209.  
  1210.  
  1211. JCXZ/JECXZ - Jump if Register (E)CX is Zero
  1212.  
  1213. Usage: JCXZ label
  1214. JECXZ label (386+)
  1215. Modifies flags: None
  1216.  
  1217. Causes execution to branch to "label" if register CX is zero. Uses
  1218. unsigned comparision.
  1219.  
  1220. Clocks Size
  1221. Operands 808x 286 386 486 Bytes
  1222.  
  1223. label: jump 18 8+m 9+m 8 2
  1224. no jump 6 4 5 5
  1225. JMP - Unconditional Jump
  1226.  
  1227. Usage: JMP target
  1228. Modifies flags: None
  1229.  
  1230. Unconditionally transfers control to "label". Jumps by default
  1231. are within -32768 to 32767 bytes from the instruction following
  1232. the jump. NEAR and SHORT jumps cause the IP to be updated while FAR
  1233. jumps cause CS and IP to be updated.
  1234.  
  1235. Clocks
  1236. Operands 808x 286 386 486
  1237.  
  1238. rel8 (relative) 15 7+m 7+m 3
  1239. rel16 (relative) 15 7+m 7+m 3
  1240. rel32 (relative) - - 7+m 3
  1241. reg16 (near, register indirect) 11 7+m 7+m 5
  1242. reg32 (near, register indirect) - - 7+m 5
  1243. mem16 (near, mem indirect) 18+EA 11+m 10+m 5
  1244. mem32 (near, mem indirect) 24+EA 15+m 10+m 5
  1245. ptr16:16 (far, dword immed) - - 12+m 17
  1246. ptr16:16 (far, PM dword immed) - - 27+m 19
  1247. ptr16:16 (call gate, same priv.) - 38+m 45+m 32
  1248. ptr16:16 (via TSS) - 175+m TS 42+TS
  1249. ptr16:16 (via task gate) - 180+m TS 43+TS
  1250. mem16:16 (far, indirect) - - 43+m 13
  1251. mem16:16 (far, PM indirect) - - 31+m 18
  1252. mem16:16 (call gate, same priv.) - 41+m 49+m 31
  1253. mem16:16 (via TSS) - 178+m 5+TS 41+TS
  1254. mem16:16 (via task gate) - 183+m 5+TS 42+TS
  1255. ptr16:32 (far, 6 byte immed) - - 12+m 13
  1256. ptr16:32 (far, PM 6 byte immed) - - 27+m 18
  1257. ptr16:32 (call gate, same priv.) - - 45+m 31
  1258. ptr16:32 (via TSS) - - TS 42+TS
  1259. ptr16:32 (via task state) - - TS 43+TS
  1260. m16:32 (far, address at dword) - - 43+m 13
  1261. m16:32 (far, address at dword) - - 31+m 18
  1262. m16:32 (call gate, same priv.) - - 49+m 31
  1263. m16:32 (via TSS) - - 5+TS 41+TS
  1264. m16:32 (via task state) - - 5+TS 42+TS
  1265.  
  1266.  
  1267. LAHF - Load Register AH From Flags
  1268.  
  1269. Usage: LAHF
  1270. Modifies flags: None
  1271.  
  1272. Copies bits 0-7 of the flags register into AH. This includes flags
  1273. AF, CF, PF, SF and ZF other bits are undefined.
  1274.  
  1275. AH := SF ZF xx AF xx PF xx CF
  1276.  
  1277. Clocks Size
  1278. Operands 808x 286 386 486 Bytes
  1279.  
  1280. none 4 2 2 3 1
  1281.  
  1282.  
  1283. LAR - Load Access Rights (286+ protected)
  1284.  
  1285. Usage: LAR dest,src
  1286. Modifies flags: ZF
  1287.  
  1288. The high byte of the of the destination register is overwritten by
  1289. the value of the access rights byte and the low order byte is zeroed
  1290. depending on the selection in the source operand. The Zero Flag is
  1291. set if the load operation is successful.
  1292.  
  1293. Clocks Size
  1294. Operands 808x 286 386 486 Bytes
  1295.  
  1296. reg16,reg16 - 14 15 11 3
  1297. reg32,reg32 - - 15 11 3
  1298. reg16,mem16 - 16 16 11 3-7
  1299. reg32,mem32 - - 16 11 3-7
  1300. LDS - Load Pointer Using DS
  1301.  
  1302. Usage: LDS dest,src
  1303. Modifies flags: None
  1304.  
  1305. Loads 32-bit pointer from memory source to destination register
  1306. and DS. The offset is placed in the destination register and the
  1307. segment is placed in DS. To use this instruction the word at the
  1308. lower memory address must contain the offset and the word at the
  1309. higher address must contain the segment. This simplifies the loading
  1310. of far pointers from the stack and the interrupt vector table.
  1311.  
  1312. Clocks Size
  1313. Operands 808x 286 386 486 Bytes
  1314.  
  1315. reg16,mem32 16+EA 7 7 6 2-4
  1316. reg,mem (PM) - - 22 12 5-7
  1317.  
  1318.  
  1319. LEA - Load Effective Address
  1320.  
  1321. Usage: LEA dest,src
  1322. Modifies flags: None
  1323.  
  1324. Transfers offset address of "src" to the destination register.
  1325.  
  1326. Clocks Size
  1327. Operands 808x 286 386 486 Bytes
  1328.  
  1329. reg,mem 2+EA 3 2 1 2-4
  1330.  
  1331. - the MOV instruction can often save clock cycles when used in
  1332. place of LEA on 8088 processors
  1333.  
  1334.  
  1335. LEAVE - Restore Stack for Procedure Exit (80188+)
  1336.  
  1337. Usage: LEAVE
  1338. Modifies flags: None
  1339.  
  1340. Releases the local variables created by the previous ENTER
  1341. instruction by restoring SP and BP to their condition before
  1342. the procedure stack frame was initialized.
  1343.  
  1344. Clocks Size
  1345. Operands 808x 286 386 486 Bytes
  1346.  
  1347. none - 5 4 5 1
  1348.  
  1349.  
  1350. LES - Load Pointer Using ES
  1351.  
  1352. Usage: LES dest,src
  1353. Modifies flags: None
  1354.  
  1355. Loads 32-bit pointer from memory source to destination register
  1356. and ES. The offset is placed in the destination register and the
  1357. segment is placed in ES. To use this instruction the word at the
  1358. lower memory address must contain the offset and the word at the
  1359. higher address must contain the segment. This simplifies the loading
  1360. of far pointers from the stack and the interrupt vector table.
  1361.  
  1362. Clocks Size
  1363. Operands 808x 286 386 486 Bytes
  1364.  
  1365. reg,mem 16+EA 7 7 6 2-4 (W88=24+EA)
  1366. reg,mem (PM) - - 22 12 5-7
  1367. LFS - Load Pointer Using FS (386+)
  1368.  
  1369. Usage: LFS dest,src
  1370. Modifies flags: None
  1371.  
  1372. Loads 32-bit pointer from memory source to destination register
  1373. and FS. The offset is placed in the destination register and the
  1374. segment is placed in FS. To use this instruction the word at the
  1375. lower memory address must contain the offset and the word at the
  1376. higher address must contain the segment. This simplifies the loading
  1377. of far pointers from the stack and the interrupt vector table.
  1378.  
  1379. Clocks Size
  1380. Operands 808x 286 386 486 Bytes
  1381.  
  1382. reg,mem - - 7 6 5-7
  1383. reg,mem (PM) - - 22 12 5-7
  1384.  
  1385.  
  1386. LGDT - Load Global Descriptor Table (286+ privileged)
  1387.  
  1388. Usage: LGDT src
  1389. Modifies flags: None
  1390.  
  1391. Loads a value from an operand into the Global Descriptor Table
  1392. (GDT) register.
  1393.  
  1394. Clocks Size
  1395. Operands 808x 286 386 486 Bytes
  1396.  
  1397. mem64 - 11 11 11 5
  1398.  
  1399.  
  1400. LIDT - Load Interrupt Descriptor Table (286+ privileged)
  1401.  
  1402. Usage: LIDT src
  1403. Modifies flags: None
  1404.  
  1405. Loads a value from an operand into the Interrupt Descriptor Table
  1406. (IDT) register.
  1407.  
  1408. Clocks Size
  1409. Operands 808x 286 386 486 Bytes
  1410.  
  1411. mem64 - 12 11 11 5
  1412.  
  1413.  
  1414. LGS - Load Pointer Using GS (386+)
  1415.  
  1416. Usage: LGS dest,src
  1417. Modifies flags: None
  1418.  
  1419. Loads 32-bit pointer from memory source to destination register
  1420. and GS. The offset is placed in the destination register and the
  1421. segment is placed in GS. To use this instruction the word at the
  1422. lower memory address must contain the offset and the word at the
  1423. higher address must contain the segment. This simplifies the loading
  1424. of far pointers from the stack and the interrupt vector table.
  1425.  
  1426. Clocks Size
  1427. Operands 808x 286 386 486 Bytes
  1428.  
  1429. reg,mem - - 7 6 5-7
  1430. reg,mem (PM) - - 22 12 5-7
  1431. LLDT - Load Local Descriptor Table (286+ privileged)
  1432.  
  1433. Usage: LLDT src
  1434. Modifies flags: None
  1435.  
  1436. Loads a value from an operand into the Local Descriptor Table
  1437. Register (LDTR).
  1438.  
  1439. Clocks Size
  1440. Operands 808x 286 386 486 Bytes
  1441.  
  1442. reg16 - 17 20 11 3
  1443. mem16 - 19 24 11 5
  1444.  
  1445.  
  1446. LMSW - Load Machine Status Word (286+ privileged)
  1447.  
  1448. Usage: LMSW src
  1449. Modifies flags: None
  1450.  
  1451. Loads the Machine Status Word (MSW) from data found at "src"
  1452.  
  1453. Clocks Size
  1454. Operands 808x 286 386 486 Bytes
  1455.  
  1456. reg16 - 3 10 13 3
  1457. mem16 - 6 13 13 5
  1458.  
  1459.  
  1460. LOCK - Lock Bus
  1461.  
  1462. Usage: LOCK
  1463. LOCK: (386+ prefix)
  1464. Modifies flags: None
  1465.  
  1466. This instruction is a prefix that causes the CPU assert bus lock
  1467. signal during the execution of the next instruction. Used to
  1468. avoid two processors from updating the same data location. The
  1469. 286 always asserts lock during an XCHG with memory operands. This
  1470. should only be used to lock the bus prior to XCHG, MOV, IN and
  1471. OUT instructions.
  1472.  
  1473. Clocks Size
  1474. Operands 808x 286 386 486 Bytes
  1475.  
  1476. none 2 0 0 1 1
  1477.  
  1478.  
  1479. LODS - Load String (Byte, Word or Double)
  1480.  
  1481. Usage: LODS src
  1482. LODSB
  1483. LODSW
  1484. LODSD (386+)
  1485. Modifies flags: None
  1486.  
  1487. Transfers string element addressed by DS:SI (even if an operand is
  1488. supplied) to the accumulator. SI is incremented based on the size
  1489. of the operand or based on the instruction used. If the Direction
  1490. Flag is set SI is decremented, if the Direction Flag is clear SI
  1491. is incremented. Use with REP prefixes.
  1492.  
  1493. Clocks Size
  1494. Operands 808x 286 386 486 Bytes
  1495.  
  1496. src 12/16 5 5 5 1
  1497. LOOP - Decrement CX and Loop if CX Not Zero
  1498.  
  1499. Usage: LOOP label
  1500. Modifies flags: None
  1501.  
  1502. Decrements CX by 1 and transfers control to "label" if CX is not
  1503. Zero. The "label" operand must be within -128 or 127 bytes of the
  1504. instruction following the loop instruction
  1505.  
  1506. Clocks Size
  1507. Operands 808x 286 386 486 Bytes
  1508.  
  1509. label: jump 18 8+m 11+m 6 2
  1510. no jump 5 4 ? 2
  1511.  
  1512.  
  1513. LOOPE/LOOPZ - Loop While Equal / Loop While Zero
  1514.  
  1515. Usage: LOOPE label
  1516. LOOPZ label
  1517. Modifies flags: None
  1518.  
  1519. Decrements CX by 1 (without modifying the flags) and transfers
  1520. control to "label" if CX != 0 and the Zero Flag is set. The
  1521. "label" operand must be within -128 or 127 bytes of the instruction
  1522. following the loop instruction.
  1523.  
  1524. Clocks Size
  1525. Operands 808x 286 386 486 Bytes
  1526.  
  1527. label: jump 18 8+m 11+m 9 2
  1528. no jump 5 4 ? 6
  1529.  
  1530.  
  1531. LOOPNZ/LOOPNE - Loop While Not Zero / Loop While Not Equal
  1532.  
  1533. Usage: LOOPNZ label
  1534. LOOPNE label
  1535. Modifies flags: None
  1536.  
  1537. Decrements CX by 1 (without modifying the flags) and transfers
  1538. control to "label" if CX != 0 and the Zero Flag is clear. The
  1539. "label" operand must be within -128 or 127 bytes of the instruction
  1540. following the loop instruction.
  1541.  
  1542. Clocks Size
  1543. Operands 808x 286 386 486 Bytes
  1544.  
  1545. label: jump 19 8+m 11+m 9 2
  1546. no jump 5 4 ? 6
  1547.  
  1548.  
  1549. LSL - Load Segment Limit (286+ protected)
  1550.  
  1551. Usage: LSL dest,src
  1552. Modifies flags: ZF
  1553.  
  1554. Loads the segment limit of a selector into the destination register
  1555. if the selector is valid and visible at the current privilege level.
  1556. If loading is successful the Zero Flag is set, otherwise it is
  1557. cleared.
  1558.  
  1559. Clocks Size
  1560. Operands 808x 286 386 486 Bytes
  1561.  
  1562. reg16,reg16 - 14 20/25 10 3
  1563. reg32,reg32 - - 20/25 10 3
  1564. reg16,mem16 - 16 21/26 10 5
  1565. reg32,mem32 - - 21/26 10 5
  1566.  
  1567. - 386 times are listed "byte granular" / "page granular"
  1568. LSS - Load Pointer Using SS (386+)
  1569.  
  1570. Usage: LSS dest,src
  1571. Modifies flags: None
  1572.  
  1573. Loads 32-bit pointer from memory source to destination register
  1574. and SS. The offset is placed in the destination register and the
  1575. segment is placed in SS. To use this instruction the word at the
  1576. lower memory address must contain the offset and the word at the
  1577. higher address must contain the segment. This simplifies the loading
  1578. of far pointers from the stack and the interrupt vector table.
  1579.  
  1580. Clocks Size
  1581. Operands 808x 286 386 486 Bytes
  1582.  
  1583. reg,mem - - 7 6 5-7
  1584. reg,mem (PM) - - 22 12 5-7
  1585.  
  1586.  
  1587. LTR - Load Task Register (286+ privileged)
  1588.  
  1589. Usage: LTR src
  1590. Modifies flags: None
  1591.  
  1592. Loads the current task register with the value specified in "src".
  1593.  
  1594. Clocks Size
  1595. Operands 808x 286 386 486 Bytes
  1596.  
  1597. reg16 - 17 23 20 3
  1598. mem16 - 19 27 20 5
  1599.  
  1600.  
  1601. MOV - Move Byte or Word
  1602.  
  1603. Usage: MOV dest,src
  1604. Modifies flags: None
  1605.  
  1606. Copies byte or word from the source operand to the destination
  1607. operand. If the destination is SS interrupts are disabled except
  1608. on early buggy 808x CPUs. Some CPUs disable interrupts if the
  1609. destination is any of the segment registers
  1610.  
  1611. Clocks Size
  1612. Operands 808x 286 386 486 Bytes
  1613.  
  1614. reg,reg 2 2 2 1 2
  1615. mem,reg 9+EA 3 2 1 2-4 (W88=13+EA)
  1616. reg,mem 8+EA 5 4 1 2-4 (W88=12+EA)
  1617. mem,immed 10+EA 3 2 1 3-6 (W88=14+EA)
  1618. reg,immed 4 2 2 1 2-3
  1619. mem,accum 10 3 2 1 3 (W88=14)
  1620. accum,mem 10 5 4 1 3 (W88=14)
  1621. segreg,reg16 2 2 2 3 2
  1622. segreg,mem16 8+EA 5 5 9 2-4 (W88=12+EA)
  1623. reg16,segreg 2 2 2 3 2
  1624. mem16,segreg 9+EA 3 2 3 2-4 (W88=13+EA)
  1625. reg32,CR0/CR2/CR3 - - 6 4
  1626. CR0,reg32 - - 10 16
  1627. CR2,reg32 - - 4 4 3
  1628. CR3,reg32 - - 5 4 3
  1629. reg32,DR0/DR1/DR2/DR3 - 22 10 3
  1630. reg32,DR6/DR7 - - 22 10 3
  1631. DR0/DR1/DR2/DR3,reg32 - 22 11 3
  1632. DR6/DR7,reg32 - - 16 11 3
  1633. reg32,TR6/TR7 - - 12 4 3
  1634. TR6/TR7,reg32 - - 12 4 3
  1635. reg32,TR3 3
  1636. TR3,reg32 6
  1637.  
  1638. - when the 386 special registers are used all operands are 32 bits
  1639. MOVS - Move String (Byte or Word)
  1640.  
  1641. Usage: MOVS dest,src
  1642. MOVSB
  1643. MOVSW
  1644. MOVSD (386+)
  1645. Modifies flags: None
  1646.  
  1647. Copies data from addressed by DS:SI (even if operands are given) to
  1648. the location ES:DI destination and updates SI and DI based on the
  1649. size of the operand or instruction used. SI and DI are incremented
  1650. when the Direction Flag is cleared and decremented when the Direction
  1651. Flag is Set. Use with REP prefixes.
  1652.  
  1653. Clocks Size
  1654. Operands 808x 286 386 486 Bytes
  1655.  
  1656. dest,src 18 5 7 7 1 (W88=26)
  1657.  
  1658.  
  1659. MOVSX - Move with Sign Extend (386+)
  1660.  
  1661. Usage: MOVSX dest,src
  1662. Modifies flags: None
  1663.  
  1664. Copies the value of the source operand to the destination register
  1665. with the sign extended.
  1666.  
  1667. Clocks Size
  1668. Operands 808x 286 386 486 Bytes
  1669.  
  1670. reg,reg - - 3 3 3
  1671. reg,mem - - 6 3 3-7
  1672.  
  1673.  
  1674. MOVZX - Move with Zero Extend (386+)
  1675.  
  1676. Usage: MOVZX dest,src
  1677. Modifies flags: None
  1678.  
  1679. Copies the value of the source operand to the destination register
  1680. with the zeroes extended.
  1681.  
  1682. Clocks Size
  1683. Operands 808x 286 386 486 Bytes
  1684.  
  1685. reg,reg - - 3 3 3
  1686. reg,mem - - 6 3 3-7
  1687.  
  1688.  
  1689. MUL - Unsigned Multiply
  1690.  
  1691. Usage: MUL src
  1692. Modifies flags: CF OF (AF,PF,SF,ZF undefined)
  1693.  
  1694. Unsigned multiply of the accumulator by the source. If "src" is
  1695. a byte value, then AL is used as the other multiplicand and the
  1696. result is placed in AX. If "src" is a word value, then AX is
  1697. multiplied by "src" and DX:AX receives the result. If "src" is
  1698. a double word value, then EAX is multiplied by "src" and EDX:EAX
  1699. receives the result. The 386+ uses an early out algorithm which
  1700. makes multiplying any size value in EAX as fast as in the 8 or 16
  1701. bit registers.
  1702.  
  1703. Clocks Size
  1704. Operands 808x 286 386 486 Bytes
  1705.  
  1706. reg8 70-77 13 9-14 13-18 2
  1707. reg16 118-113 21 9-22 13-26 2
  1708. reg32 - - 9-38 13-42 2-4
  1709. mem8 (76-83)+EA 16 12-17 13-18 2-4
  1710. mem16 (124-139)+EA 24 12-25 13-26 2-4
  1711. mem32 - - 12-21 13-42 2-4
  1712. NEG - Two's Complement Negation
  1713.  
  1714. Usage: NEG dest
  1715. Modifies flags: AF CF OF PF SF ZF
  1716.  
  1717. Subtracts the destination from 0 and saves the 2s complement of
  1718. "dest" back into "dest".
  1719.  
  1720. Clocks Size
  1721. Operands 808x 286 386 486 Bytes
  1722.  
  1723. reg 3 2 2 1 2
  1724. mem 16+EA 7 6 3 2-4 (W88=24+EA)
  1725.  
  1726.  
  1727. NOP - No Operation (90h)
  1728.  
  1729. Usage: NOP
  1730. Modifies flags: None
  1731.  
  1732. This is a do nothing instruction. It results in occupation of both
  1733. space and time and is most useful for patching code segments.
  1734. (This is the original XCHG AL,AL instruction)
  1735.  
  1736. Clocks Size
  1737. Operands 808x 286 386 486 Bytes
  1738.  
  1739. none 3 3 3 1 1
  1740.  
  1741.  
  1742. NOT - One's Compliment Negation (Logical NOT)
  1743.  
  1744. Usage: NOT dest
  1745. Modifies flags: None
  1746.  
  1747. Inverts the bits of the "dest" operand forming the 1s complement.
  1748.  
  1749. Clocks Size
  1750. Operands 808x 286 386 486 Bytes
  1751.  
  1752. reg 3 2 2 1 2
  1753. mem 16+EA 7 6 3 2-4 (W88=24+EA)
  1754.  
  1755.  
  1756. OR - Inclusive Logical OR
  1757.  
  1758. Usage: OR dest,src
  1759. Modifies flags: CF OF PF SF ZF (AF undefined)
  1760.  
  1761. Logical inclusive OR of the two operands returning the result in
  1762. the destination. Any bit set in either operand will be set in the
  1763. destination.
  1764.  
  1765. Clocks Size
  1766. Operands 808x 286 386 486 Bytes
  1767.  
  1768. reg,reg 3 2 2 1 2
  1769. mem,reg 16+EA 7 7 3 2-4 (W88=24+EA)
  1770. reg,mem 9+EA 7 6 2 2-4 (W88=13+EA)
  1771. reg,immed 4 3 2 1 3-4
  1772. mem8,immed8 17+EA 7 7 3 3-6
  1773. mem16,immed16 25+EA 7 7 3 3-6
  1774. accum,immed 4 3 2 1 2-3
  1775. OUT - Output Data to Port
  1776.  
  1777. Usage: OUT port,accum
  1778. Modifies flags: None
  1779.  
  1780. Transfers byte in AL,word in AX or dword in EAX to the specified
  1781. hardware port address. If the port number is in the range of 0-255
  1782. it can be specified as an immediate. If greater than 255 then the
  1783. port number must be specified in DX. Since the PC only decodes 10
  1784. bits of the port address, values over 1023 can only be decoded by
  1785. third party vendor equipment and also map to the port range 0-1023.
  1786.  
  1787. Clocks Size
  1788. Operands 808x 286 386 486 Bytes
  1789.  
  1790. immed8,accum 10/14 3 10 16 2
  1791. immed8,accum (PM) - - 4/24 11/31/29 2
  1792. DX,accum 8/12 3 11 16 1
  1793. DX,accum (PM) - - 5/25 10/30/29 1
  1794.  
  1795. - 386+ protected mode timings depend on privilege levels.
  1796.  
  1797. first number is the timing when: CPL ó IOPL
  1798. second number is the timing when: CPL > IOPL
  1799. third number is the timing when: virtual mode on 486 processor
  1800.  
  1801.  
  1802. OUTS - Output String to Port (80188+)
  1803.  
  1804. Usage: OUTS port,src
  1805. OUTSB
  1806. OUTSW
  1807. OUTSD (386+)
  1808. Modifies flags: None
  1809.  
  1810. Transfers a byte, word or doubleword from "src" to the hardware
  1811. port specified in DX. For instructions with no operands the "src"
  1812. is located at DS:SI and SI is incremented or decremented by the
  1813. size of the operand or the size dictated by the instruction format.
  1814. When the Direction Flag is set SI is decremented, when clear, SI is
  1815. incremented. If the port number is in the range of 0-255 it can
  1816. be specified as an immediate. If greater than 255 then the port
  1817. number must be specified in DX. Since the PC only decodes 10 bits
  1818. of the port address, values over 1023 can only be decoded by third
  1819. party vendor equipment and also map to the port range 0-1023.
  1820.  
  1821. Clocks Size
  1822. Operands 808x 286 386 486 Bytes
  1823.  
  1824. port,src - 5 14 17 1
  1825. port,src (PM) - - 8/28 10/32/30 1
  1826.  
  1827. - 386+ protected mode timings depend on privilege levels.
  1828.  
  1829. first number is the timing when: CPL ó IOPL
  1830. second number is the timing when: CPL > IOPL
  1831. third number is the timing when: virtual mode on 486 processor
  1832.  
  1833.  
  1834. POP - Pop Word off Stack
  1835.  
  1836. Usage: POP dest
  1837. Modifies flags: None
  1838.  
  1839. Transfers word at the current stack top (SS:SP) to the destination
  1840. then increments SP by two to point to the new stack top. CS is not
  1841. a valid destination.
  1842.  
  1843. Clocks Size
  1844. Operands 808x 286 386 486 Bytes
  1845.  
  1846. reg16 8 5 4 4 1
  1847. reg32 4 - - 4 1
  1848. segreg 8 5 7 3 1
  1849. mem16 17+EA 5 5 6 2-4
  1850. mem32 5 - - 6 2-4
  1851. POPA/POPAD - Pop All Registers onto Stack (80188+)
  1852.  
  1853. Usage: POPA
  1854. POPAD (386+)
  1855. Modifies flags: None
  1856.  
  1857. Pops the top 8 words off the stack into the 8 general purpose 16/32
  1858. bit registers. Registers are popped in the following order: (E)DI,
  1859. (E)SI, (E)BP, (E)SP, (E)DX, (E)CX and (E)AX. The (E)SP value popped
  1860. from the stack is actually discarded.
  1861.  
  1862. Clocks Size
  1863. Operands 808x 286 386 486 Bytes
  1864.  
  1865. none - 19 24 9 1
  1866.  
  1867.  
  1868. POPF/POPFD - Pop Flags off Stack
  1869.  
  1870. Usage: POPF
  1871. POPFD (386+)
  1872. Modifies flags: all flags
  1873.  
  1874. Pops word/doubleword from stack into the Flags Register and then
  1875. increments SP by 2 (for POPF) or 4 (for POPFD).
  1876.  
  1877. Clocks Size
  1878. Operands 808x 286 386 486 Bytes
  1879.  
  1880. none 8/12 5 5 9 1 (W88=12)
  1881. none (PM) - - 5 6 1
  1882.  
  1883.  
  1884. PUSH - Push Word onto Stack
  1885.  
  1886. Usage: PUSH src
  1887. PUSH immed (80188+ only)
  1888. Modifies flags: None
  1889.  
  1890. Decrements SP by the size of the operand (two or four, byte values
  1891. are sign extended) and transfers one word from source to the stack
  1892. top (SS:SP).
  1893.  
  1894. Clocks Size
  1895. Operands 808x 286 386 486 Bytes
  1896.  
  1897. reg16 11/15 3 2 1 1
  1898. reg32 - - 2 1 1
  1899. mem16 16+EA 5 5 4 2-4 (W88=24+EA)
  1900. mem32 - - 5 4 2-4
  1901. segreg 10/14 3 2 3 1
  1902. immed - 3 2 1 2-3
  1903.  
  1904.  
  1905. PUSHA/PUSHAD - Push All Registers onto Stack (80188+)
  1906.  
  1907. Usage: PUSHA
  1908. PUSHAD (386+)
  1909. Modifies flags: None
  1910.  
  1911. Pushes all general purpose registers onto the stack in the following
  1912. order: (E)AX, (E)CX, (E)DX, (E)BX, (E)SP, (E)BP, (E)SI, (E)DI. The
  1913. value of SP is the value before the actual push of SP.
  1914.  
  1915. Clocks Size
  1916. Operands 808x 286 386 486 Bytes
  1917.  
  1918. none - 19 24 11 1
  1919. PUSHF/PUSHFD - Push Flags onto Stack
  1920.  
  1921. Usage: PUSHF
  1922. PUSHFD (386+)
  1923. Modifies flags: None
  1924.  
  1925. Transfers the Flags Register onto the stack. PUSHF saves a 16 bit
  1926. value while PUSHFD saves a 32 bit value.
  1927.  
  1928. Clocks Size
  1929. Operands 808x 286 386 486 Bytes
  1930.  
  1931. none 10/14 3 4 4 1
  1932. none (PM) - - 4 3 1
  1933.  
  1934.  
  1935. RCL - Rotate Through Carry Left
  1936.  
  1937. Usage: RCL dest,count
  1938. Modifies flags: CF OF
  1939.  
  1940. ÚÄ¿ ÚÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ¿
  1941. ÚÄþ³C³<þÄÄþ³7 <ÄÄÄÄÄÄÄÄÄÄ 0³<Ä¿
  1942. ³ ÀÄÙ ÀÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÙ ³
  1943. ÀÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÙ
  1944.  
  1945. Rotates the bits in the destination to the left "count" times with
  1946. all data pushed out the left side re-entering on the right. The
  1947. Carry Flag holds the last bit rotated out.
  1948.  
  1949. Clocks Size
  1950. Operands 808x 286 386 486 Bytes
  1951.  
  1952. reg,1 2 2 9 3 2
  1953. mem,1 15+EA 7 10 4 2-4 (W88=23+EA)
  1954. reg,CL 8+4n 5+n 9 8-30 2
  1955. mem,CL 20+EA+4n 8+n 10 9-31 2-4 (W88=28+EA+4n)
  1956. reg,immed8 - 5+n 9 8-30 3
  1957. mem,immed8 - 8+n 10 9-31 3-5
  1958.  
  1959.  
  1960. RCR - Rotate Through Carry Right
  1961.  
  1962. Usage: RCR dest,count
  1963. Modifies flags: CF OF
  1964.  
  1965. ÚÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ¿ ÚÄ¿
  1966. ÚÄ>³7 þÄÄÄÄÄÄÄÄÄ> 0³þÄÄÄ>³C³þÄ¿
  1967. ³ ÀÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÙ ÀÄÙ ³
  1968. ÀÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÙ
  1969.  
  1970. Rotates the bits in the destination to the right "count" times with
  1971. all data pushed out the right side re-entering on the left. The
  1972. Carry Flag holds the last bit rotated out.
  1973.  
  1974. Clocks Size
  1975. Operands 808x 286 386 486 Bytes
  1976.  
  1977. reg,1 2 2 9 3 2
  1978. mem,1 15+EA 7 10 4 2-4 (W88=23+EA)
  1979. reg,CL 8+4n 5+n 9 8-30 2
  1980. mem,CL 20+EA+4n 8+n 10 9-31 2-4 (W88=28+EA+4n)
  1981. reg,immed8 - 5+n 9 8-30 3
  1982. mem,immed8 - 8+n 10 9-31 3-5
  1983. REP - Repeat String Operation
  1984.  
  1985. Usage: REP
  1986. Modifies flags: None
  1987.  
  1988. Repeats execution of string instructions while CX != 0. After
  1989. each string operation, CX is decremented and the Zero Flag is
  1990. tested. The combination of a repeat prefix and a segment override
  1991. on CPU's before the 386 may result in errors if an interrupt occurs
  1992. before CX=0. The following code shows code that is susceptible to
  1993. this and how to avoid it:
  1994.  
  1995. again: rep movs byte ptr ES:[DI],ES:[SI] ; vulnerable instr.
  1996. jcxz next ; continue if REP successful
  1997. loop again ; interrupt goofed count
  1998. next:
  1999.  
  2000. Clocks Size
  2001. Operands 808x 286 386 486 Bytes
  2002.  
  2003. none 2 2 2 1
  2004.  
  2005.  
  2006. REPE/REPZ - Repeat Equal / Repeat Zero
  2007.  
  2008. Usage: REPE
  2009. REPZ
  2010. Modifies flags: None
  2011.  
  2012. Repeats execution of string instructions while CX != 0 and the Zero
  2013. Flag is set. CX is decremented and the Zero Flag tested after
  2014. each string operation. The combination of a repeat prefix and a
  2015. segment override on processors other than the 386 may result in
  2016. errors if an interrupt occurs before CX=0.
  2017.  
  2018. Clocks Size
  2019. Operands 808x 286 386 486 Bytes
  2020.  
  2021. none 2 2 2 1
  2022.  
  2023.  
  2024. REPNE/REPNZ - Repeat Not Equal / Repeat Not Zero
  2025.  
  2026. Usage: REPNE
  2027. REPNZ
  2028. Modifies flags: None
  2029.  
  2030. Repeats execution of string instructions while CX != 0 and the Zero
  2031. Flag is clear. CX is decremented and the Zero Flag tested after
  2032. each string operation. The combination of a repeat prefix and a
  2033. segment override on processors other than the 386 may result in
  2034. errors if an interrupt occurs before CX=0.
  2035.  
  2036. Clocks Size
  2037. Operands 808x 286 386 486 Bytes
  2038.  
  2039. none 2 2 2 1
  2040. RET/RETF - Return From Procedure
  2041.  
  2042. Usage: RET nBytes
  2043. RETF nBytes
  2044. RETN nBytes
  2045. Modifies flags: None
  2046.  
  2047. Transfers control from a procedure back to the instruction address
  2048. saved on the stack. "n bytes" is an optional number of bytes to
  2049. release. Far returns pop the IP followed by the CS, while near
  2050. returns pop only the IP register.
  2051.  
  2052. Clocks Size
  2053. Operands 808x 286 386 486 Bytes
  2054.  
  2055. retn 16/20 11+m 10+m 5 1
  2056. retn immed 20/24 11+m 10+m 5 3
  2057. retf 26/34 15+m 18+m 13 1
  2058. retf (PM, same priv.) - 32+m 18 1
  2059. retf (PM, lesser priv.) - 68 33 1
  2060. retf immed 25/33 15+m 18+m 14 3
  2061. retf immed (PM, same priv.) 32+m 17 1
  2062. retf immed (PM, lesser priv.) 68 33 1
  2063.  
  2064.  
  2065. ROL - Rotate Left
  2066.  
  2067. Usage: ROL dest,count
  2068. Modifies flags: CF OF
  2069.  
  2070. ÚÄ¿ ÚÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ¿
  2071. ³C³<þÂÄþ³7 <ÄÄÄÄÄÄÄÄÄÄ 0³<Ä¿
  2072. ÀÄÙ ³ ÀÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÙ ³
  2073. ÀÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÙ
  2074.  
  2075. Rotates the bits in the destination to the left "count" times with
  2076. all data pushed out the left side re-entering on the right. The
  2077. Carry Flag will contain the value of the last bit rotated out.
  2078.  
  2079. Clocks Size
  2080. Operands 808x 286 386 486 Bytes
  2081.  
  2082. reg,1 2 2 3 3 2
  2083. mem,1 15+EA 7 7 4 2-4 (W88=23+EA)
  2084. reg,CL 8+4n 5+n 3 3 2
  2085. mem,CL 20+EA+4n 8+n 7 4 2-4 (W88=28+EA+4n)
  2086. reg,immed8 - 5+n 3 2 3
  2087. mem,immed8 - 8+n 7 4 3-5
  2088.  
  2089.  
  2090. ROR - Rotate Right
  2091.  
  2092. Usage: ROR dest,count
  2093. Modifies flags: CF OF
  2094.  
  2095. ÚÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ¿ ÚÄ¿
  2096. ÚÄ>³7 þÄÄÄÄÄÄÄÄÄ> 0³þÄÂÄ>³C³
  2097. ³ ÀÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÙ ³ ÀÄÙ
  2098. ÀÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÙ
  2099.  
  2100. Rotates the bits in the destination to the right "count" times with
  2101. all data pushed out the right side re-entering on the left. The
  2102. Carry Flag will contain the value of the last bit rotated out.
  2103.  
  2104. Clocks Size
  2105. Operands 808x 286 386 486 Bytes
  2106.  
  2107. reg,1 2 2 3 3 2
  2108. mem,1 15+EA 7 7 4 2-4 (W88=23+EA)
  2109. reg,CL 8+4n 5+n 3 3 2
  2110. mem,CL 20+EA+4n 8+n 7 4 2-4 (W88=28+EA+4n)
  2111. reg,immed8 - 5+n 3 2 3
  2112. mem,immed8 - 8+n 7 4 3-5
  2113. SAHF - Store AH Register into FLAGS
  2114.  
  2115. Usage: SAHF
  2116. Modifies flags: AF CF PF SF ZF
  2117.  
  2118. Transfers bits 0-7 of AH into the Flags Register. This includes
  2119. AF, CF, PF, SF and ZF.
  2120.  
  2121. Clocks Size
  2122. Operands 808x 286 386 486 Bytes
  2123.  
  2124. none 4 2 3 2 1
  2125.  
  2126.  
  2127. SAL/SHL - Shift Arithmetic Left / Shift Logical Left
  2128.  
  2129. Usage: SAL dest,count
  2130. SHL dest,count
  2131. Modifies flags: CF OF PF SF ZF (AF undefined)
  2132.  
  2133. ÚÄ¿ ÚÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ¿ ÚÄ¿
  2134. ³C³<ÄÄÄþ³7 <ÄÄÄÄÄÄÄÄÄÄ 0³<ÄÄÄþ³0³
  2135. ÀÄÙ ÀÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÙ ÀÄÙ
  2136.  
  2137. Shifts the destination left by "count" bits with zeroes shifted
  2138. in on right. The Carry Flag contains the last bit shifted out.
  2139.  
  2140. Clocks Size
  2141. Operands 808x 286 386 486 Bytes
  2142.  
  2143. reg,1 2 2 3 3 2
  2144. mem,1 15+EA 7 7 4 2-4 (W88=23+EA)
  2145. reg,CL 8+4n 5+n 3 3 2
  2146. mem,CL 20+EA+4n 8+n 7 4 2-4 (W88=28+EA+4n)
  2147. reg,immed8 - 5+n 3 2 3
  2148. mem,immed8 - 8+n 7 4 3-5
  2149.  
  2150.  
  2151. SAR - Shift Arithmetic Right
  2152.  
  2153. Usage: SAR dest,count
  2154. Modifies flags: CF OF PF SF ZF (AF undefined)
  2155.  
  2156. ÚÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ¿ ÚÄ¿
  2157. ÚÄþ³7 ÄÄÄÄÄÄÄÄÄÄ> 0³ÄÄÄþ>³C³
  2158. ³ ÀÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÙ ÀÄÙ
  2159. ÀÄÄÄ^
  2160.  
  2161. Shifts the destination right by "count" bits with the current sign
  2162. bit replicated in the leftmost bit. The Carry Flag contains the
  2163. last bit shifted out.
  2164.  
  2165. Clocks Size
  2166. Operands 808x 286 386 486 Bytes
  2167.  
  2168. reg,1 2 2 3 3 2
  2169. mem,1 15+EA 7 7 4 2-4 (W88=23+EA)
  2170. reg,CL 8+4n 5+n 3 3 2
  2171. mem,CL 20+EA+4n 8+n 7 4 2-4 (W88=28+EA+4n)
  2172. reg,immed8 - 5+n 3 2 3
  2173. mem,immed8 - 8+n 7 4 3-5
  2174. SBB - Subtract with Borrow/Carry
  2175.  
  2176. Usage: SBB dest,src
  2177. Modifies flags: AF CF OF PF SF ZF
  2178.  
  2179. Subtracts the source from the destination, and subtracts 1 extra if
  2180. the Carry Flag is set. Results are returned in "dest".
  2181.  
  2182. Clocks Size
  2183. Operands 808x 286 386 486 Bytes
  2184.  
  2185. reg,reg 3 2 2 1 2
  2186. mem,reg 16+EA 7 6 3 2-4 (W88=24+EA)
  2187. reg,mem 9+EA 7 7 2 2-4 (W88=13+EA)
  2188. reg,immed 4 3 2 1 3-4
  2189. mem,immed 17+EA 7 7 3 3-6 (W88=25+EA)
  2190. accum,immed 4 3 2 1 2-3
  2191.  
  2192.  
  2193. SCAS - Scan String (Byte, Word or Doubleword)
  2194.  
  2195. Usage: SCAS string
  2196. SCASB
  2197. SCASW
  2198. SCASD (386+)
  2199. Modifies flags: AF CF OF PF SF ZF
  2200.  
  2201. Compares value at ES:DI (even if operand is specified) from the
  2202. accumulator and sets the flags similar to a subtraction. DI is
  2203. incremented/decremented based on the instruction format (or
  2204. operand size) and the state of the Direction Flag. Use with REP
  2205. prefixes.
  2206.  
  2207. Clocks Size
  2208. Operands 808x 286 386 486 Bytes
  2209.  
  2210. string 15 7 7 6 1 (W88=19)
  2211.  
  2212.  
  2213. SETAE/SETNB - Set if Above or Equal / Set if Not Below (386+)
  2214.  
  2215. Usage: SETAE dest
  2216. SETNB dest
  2217. (unsigned, 386+)
  2218. Modifies flags: none
  2219.  
  2220. Sets the byte in the operand to 1 if the Carry Flag is clear
  2221. otherwise sets the operand to 0.
  2222.  
  2223. Clocks Size
  2224. Operands 808x 286 386 486 Bytes
  2225.  
  2226. reg8 - - 4 3 3
  2227. mem8 - - 5 4 3
  2228.  
  2229.  
  2230. SETB/SETNAE - Set if Below / Set if Not Above or Equal (386+)
  2231.  
  2232. Usage: SETB dest
  2233. SETNAE dest
  2234. (unsigned, 386+)
  2235. Modifies flags: none
  2236.  
  2237. Sets the byte in the operand to 1 if the Carry Flag is set
  2238. otherwise sets the operand to 0.
  2239.  
  2240. Clocks Size
  2241. Operands 808x 286 386 486 Bytes
  2242.  
  2243. reg8 - - 4 3 3
  2244. mem8 - - 5 4 3
  2245. SETBE/SETNA - Set if Below or Equal / Set if Not Above (386+)
  2246.  
  2247. Usage: SETBE dest
  2248. SETNA dest
  2249. (unsigned, 386+)
  2250. Modifies flags: none
  2251.  
  2252. Sets the byte in the operand to 1 if the Carry Flag or the Zero
  2253. Flag is set, otherwise sets the operand to 0.
  2254.  
  2255. Clocks Size
  2256. Operands 808x 286 386 486 Bytes
  2257.  
  2258. reg8 - - 4 3 3
  2259. mem8 - - 5 4 3
  2260.  
  2261.  
  2262. SETE/SETZ - Set if Equal / Set if Zero (386+)
  2263.  
  2264. Usage: SETE dest
  2265. SETZ dest
  2266. Modifies flags: none
  2267.  
  2268. Sets the byte in the operand to 1 if the Zero Flag is set,
  2269. otherwise sets the operand to 0.
  2270.  
  2271. Clocks Size
  2272. Operands 808x 286 386 486 Bytes
  2273.  
  2274. reg8 - - 4 3 3
  2275. mem8 - - 5 4 3
  2276.  
  2277.  
  2278. SETNE/SETNZ - Set if Not Equal / Set if Not Zero (386+)
  2279.  
  2280. Usage: SETNE dest
  2281. SETNZ dest
  2282. Modifies flags: none
  2283.  
  2284. Sets the byte in the operand to 1 if the Zero Flag is clear,
  2285. otherwise sets the operand to 0.
  2286.  
  2287. Clocks Size
  2288. Operands 808x 286 386 486 Bytes
  2289.  
  2290. reg8 - - 4 3 3
  2291. mem8 - - 5 4 3
  2292.  
  2293.  
  2294. SETL/SETNGE - Set if Less / Set if Not Greater or Equal (386+)
  2295.  
  2296. Usage: SETL dest
  2297. SETNGE dest
  2298. (signed, 386+)
  2299. Modifies flags: none
  2300.  
  2301. Sets the byte in the operand to 1 if the Sign Flag is not equal
  2302. to the Overflow Flag, otherwise sets the operand to 0.
  2303.  
  2304. Clocks Size
  2305. Operands 808x 286 386 486 Bytes
  2306.  
  2307. reg8 - - 4 3 3
  2308. mem8 - - 5 4 3
  2309. SETGE/SETNL - Set if Greater or Equal / Set if Not Less (386+)
  2310.  
  2311. Usage: SETGE dest
  2312. SETNL dest
  2313. (signed, 386+)
  2314. Modifies flags: none
  2315.  
  2316. Sets the byte in the operand to 1 if the Sign Flag equals the
  2317. Overflow Flag, otherwise sets the operand to 0.
  2318.  
  2319. Clocks Size
  2320. Operands 808x 286 386 486 Bytes
  2321.  
  2322. reg8 - - 4 3 3
  2323. mem8 - - 5 4 3
  2324.  
  2325.  
  2326. SETLE/SETNG - Set if Less or Equal / Set if Not greater or Equal (386+)
  2327.  
  2328. Usage: SETLE dest
  2329. SETNG dest
  2330. (signed, 386+)
  2331. Modifies flags: none
  2332.  
  2333. Sets the byte in the operand to 1 if the Zero Flag is set or the
  2334. Sign Flag is not equal to the Overflow Flag, otherwise sets the
  2335. operand to 0.
  2336.  
  2337. Clocks Size
  2338. Operands 808x 286 386 486 Bytes
  2339.  
  2340. reg8 - - 4 3 3
  2341. mem8 - - 5 4 3
  2342.  
  2343.  
  2344. SETG/SETNLE - Set if Greater / Set if Not Less or Equal (386+)
  2345.  
  2346. Usage: SETG dest
  2347. SETNLE dest
  2348. (signed, 386+)
  2349. Modifies flags: none
  2350.  
  2351. Sets the byte in the operand to 1 if the Zero Flag is clear or the
  2352. Sign Flag equals to the Overflow Flag, otherwise sets the operand
  2353. to 0.
  2354.  
  2355. Clocks Size
  2356. Operands 808x 286 386 486 Bytes
  2357.  
  2358. reg8 - - 4 3 3
  2359. mem8 - - 5 4 3
  2360.  
  2361.  
  2362. SETS - Set if Signed (386+)
  2363.  
  2364. Usage: SETS dest
  2365. Modifies flags: none
  2366.  
  2367. Sets the byte in the operand to 1 if the Sign Flag is set, otherwise
  2368. sets the operand to 0.
  2369.  
  2370. Clocks Size
  2371. Operands 808x 286 386 486 Bytes
  2372.  
  2373. reg8 - - 4 3 3
  2374. mem8 - - 5 4 3
  2375. SETNS - Set if Not Signed (386+)
  2376.  
  2377. Usage: SETNS dest
  2378. Modifies flags: none
  2379.  
  2380. Sets the byte in the operand to 1 if the Sign Flag is clear,
  2381. otherwise sets the operand to 0.
  2382.  
  2383. Clocks Size
  2384. Operands 808x 286 386 486 Bytes
  2385.  
  2386. reg8 - - 4 3 3
  2387. mem8 - - 5 4 3
  2388.  
  2389.  
  2390. SETC - Set if Carry (386+)
  2391.  
  2392. Usage: SETC dest
  2393. Modifies flags: none
  2394.  
  2395. Sets the byte in the operand to 1 if the Carry Flag is set,
  2396. otherwise sets the operand to 0.
  2397.  
  2398. Clocks Size
  2399. Operands 808x 286 386 486 Bytes
  2400.  
  2401. reg8 - - 4 3 3
  2402. mem8 - - 5 4 3
  2403.  
  2404.  
  2405. SETNC - Set if Not Carry (386+)
  2406.  
  2407. Usage: SETNC dest
  2408. Modifies flags: none
  2409.  
  2410. Sets the byte in the operand to 1 if the Carry Flag is clear,
  2411. otherwise sets the operand to 0.
  2412.  
  2413. Clocks Size
  2414. Operands 808x 286 386 486 Bytes
  2415.  
  2416. reg8 - - 4 3 3
  2417. mem8 - - 5 4 3
  2418.  
  2419.  
  2420. SETO - Set if Overflow (386+)
  2421.  
  2422. Usage: SETO dest
  2423. Modifies flags: none
  2424.  
  2425. Sets the byte in the operand to 1 if the Overflow Flag is set,
  2426. otherwise sets the operand to 0.
  2427.  
  2428. Clocks Size
  2429. Operands 808x 286 386 486 Bytes
  2430.  
  2431. reg8 - - 4 3 3
  2432. mem8 - - 5 4 3
  2433.  
  2434.  
  2435. SETNO - Set if Not Overflow (386+)
  2436.  
  2437. Usage: SETNO dest
  2438. Modifies flags: none
  2439.  
  2440. Sets the byte in the operand to 1 if the Overflow Flag is clear,
  2441. otherwise sets the operand to 0.
  2442.  
  2443. Clocks Size
  2444. Operands 808x 286 386 486 Bytes
  2445.  
  2446. reg8 - - 4 3 3
  2447. mem8 - - 5 4 3
  2448. SETP/SETPE - Set if Parity / Set if Parity Even (386+)
  2449.  
  2450. Usage: SETP dest
  2451. SETPE dest
  2452. Modifies flags: none
  2453.  
  2454. Sets the byte in the operand to 1 if the Parity Flag is set,
  2455. otherwise sets the operand to 0.
  2456.  
  2457. Clocks Size
  2458. Operands 808x 286 386 486 Bytes
  2459.  
  2460. reg8 - - 4 3 3
  2461. mem8 - - 5 4 3
  2462.  
  2463.  
  2464. SETNP/SETPO - Set if No Parity / Set if Parity Odd (386+)
  2465.  
  2466. Usage: SETNP dest
  2467. SETPO dest
  2468. Modifies flags: none
  2469.  
  2470. Sets the byte in the operand to 1 if the Parity Flag is clear,
  2471. otherwise sets the operand to 0.
  2472.  
  2473. Clocks Size
  2474. Operands 808x 286 386 486 Bytes
  2475.  
  2476. reg8 - - 4 3 3
  2477. mem8 - - 5 4 3
  2478.  
  2479.  
  2480. SGDT - Store Global Descriptor Table (286+ privileged)
  2481.  
  2482. Usage: SGDT dest
  2483. Modifies flags: none
  2484.  
  2485. Stores the Global Descriptor Table (GDT) Register into the
  2486. specified operand.
  2487.  
  2488. Clocks Size
  2489. Operands 808x 286 386 486 Bytes
  2490.  
  2491. mem64 - 11 9 10 5
  2492.  
  2493.  
  2494. SIDT - Store Interrupt Descriptor Table (286+ privileged)
  2495.  
  2496. Usage: SIDT dest
  2497. Modifies flags: none
  2498.  
  2499. Stores the Interrupt Descriptor Table (IDT) Register into the
  2500. specified operand.
  2501.  
  2502. Clocks Size
  2503. Operands 808x 286 386 486 Bytes
  2504.  
  2505. mem64 - 12 9 10 5
  2506.  
  2507.  
  2508. SHL - Shift Logical Left
  2509.  
  2510. See: SAL
  2511. SHR - Shift Logical Right
  2512.  
  2513. Usage: SHR dest,count
  2514. Modifies flags: CF OF PF SF ZF (AF undefined)
  2515.  
  2516. ÚÄ¿ ÚÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄ¿ ÚÄ¿
  2517. ³0³ÄÄÄþ>³7 ÄÄÄÄÄÄÄÄÄÄ> 0³ÄÄÄþ>³C³
  2518. ÀÄÙ ÀÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄÙ ÀÄÙ
  2519.  
  2520. Shifts the destination right by "count" bits with zeroes shifted
  2521. in on the left. The Carry Flag contains the last bit shifted out.
  2522.  
  2523. Clocks Size
  2524. Operands 808x 286 386 486 Bytes
  2525.  
  2526. reg,1 2 2 3 2
  2527. mem,1 15+EA 7 7 2-4 (W88=23+EA)
  2528. reg,CL 8+4n 5+n 3 2
  2529. mem,CL 20+EA+4n 8+n 7 2-4 (W88=28+EA+4n)
  2530. reg,immed8 - 5+n 3 3
  2531. mem,immed8 - 8+n 7 3-5
  2532.  
  2533.  
  2534. SHLD/SHRD - Double Precision Shift (386+)
  2535.  
  2536. Usage: SHLD dest,src,count
  2537. SHRD dest,src,count
  2538. Modifies flags: CF PF SF ZF (OF,AF undefined)
  2539.  
  2540. SHLD shifts "dest" to the left "count" times and the bit positions
  2541. opened are filled with the most significant bits of "src". SHRD
  2542. shifts "dest" to the right "count" times and the bit positions
  2543. opened are filled with the least significant bits of the second
  2544. operand. Only the 5 lower bits of "count" are used.
  2545.  
  2546. Clocks Size
  2547. Operands 808x 286 386 486 Bytes
  2548.  
  2549. reg16,reg16,immed8 - - 3 2 4
  2550. reg32,reg32,immed8 - - 3 2 4
  2551. mem16,reg16,immed8 - - 7 3 6
  2552. mem32,reg32,immed8 - - 7 3 6
  2553. reg16,reg16,CL - - 3 3 3
  2554. reg32,reg32,CL - - 3 3 3
  2555. mem16,reg16,CL - - 7 4 5
  2556. mem32,reg32,CL - - 7 4 5
  2557.  
  2558.  
  2559. SLDT - Store Local Descriptor Table (286+ privileged)
  2560.  
  2561. Usage: SLDT dest
  2562. Modifies flags: none
  2563.  
  2564. Stores the Local Descriptor Table (LDT) Register into the
  2565. specified operand.
  2566.  
  2567. Clocks Size
  2568. Operands 808x 286 386 486 Bytes
  2569.  
  2570. reg16 - 2 2 2 3
  2571. mem16 - 2 2 3 5
  2572.  
  2573.  
  2574. SMSW - Store Machine Status Word (286+ privileged)
  2575.  
  2576. Usage: SMSW dest
  2577. Modifies flags: none
  2578.  
  2579. Store Machine Status Word (MSW) into "dest".
  2580.  
  2581. Clocks Size
  2582. Operands 808x 286 386 486 Bytes
  2583.  
  2584. reg16 - 2 10 2 3
  2585. mem16 - 3 3 3 5
  2586. STC - Set Carry
  2587.  
  2588. Usage: STC
  2589. Modifies flags: CF
  2590.  
  2591. Sets the Carry Flag to 1.
  2592.  
  2593. Clocks Size
  2594. Operands 808x 286 386 486 Bytes
  2595.  
  2596. none 2 2 2 2 1
  2597.  
  2598.  
  2599. STD - Set Direction Flag
  2600.  
  2601. Usage: STD
  2602. Modifies flags: DF
  2603.  
  2604. Sets the Direction Flag to 1 causing string instructions to
  2605. auto-decrement SI and DI instead of auto-increment.
  2606.  
  2607. Clocks Size
  2608. Operands 808x 286 386 486 Bytes
  2609.  
  2610. none 2 2 2 2 1
  2611.  
  2612.  
  2613. STI - Set Interrupt Flag (Enable Interrupts)
  2614.  
  2615. Usage: STI
  2616. Modifies flags: IF
  2617.  
  2618. Sets the Interrupt Flag to 1, which enables recognition of all
  2619. hardware interrupts. If an interrupt is generated by a hardware
  2620. device, an End of Interrupt (EOI) must also be issued to enable
  2621. other hardware interrupts of the same or lower priority.
  2622.  
  2623. Clocks Size
  2624. Operands 808x 286 386 486 Bytes
  2625.  
  2626. none 2 2 2 5 1
  2627.  
  2628.  
  2629. STOS - Store String (Byte, Word or Doubleword)
  2630.  
  2631. Usage: STOS dest
  2632. STOSB
  2633. STOSW
  2634. STOSD
  2635. Modifies flags: None
  2636.  
  2637. Stores value in accumulator to location at ES:(E)DI (even if operand
  2638. is given). (E)DI is incremented/decremented based on the size of
  2639. the operand (or instruction format) and the state of the Direction
  2640. Flag. Use with REP prefixes.
  2641.  
  2642. Clocks Size
  2643. Operands 808x 286 386 486 Bytes
  2644.  
  2645. dest 11 3 4 5 1 (W88=15)
  2646.  
  2647.  
  2648. STR - Store Task Register (286+ privileged)
  2649.  
  2650. Usage: STR dest
  2651. Modifies flags: None
  2652.  
  2653. Stores the current Task Register to the specified operand.
  2654.  
  2655. Clocks Size
  2656. Operands 808x 286 386 486 Bytes
  2657.  
  2658. reg16 - 2 2 2 3
  2659. mem16 - 3 2 3 5
  2660. SUB - Subtract
  2661.  
  2662. Usage: SUB dest,src
  2663. Modifies flags: AF CF OF PF SF ZF
  2664.  
  2665. The source is subtracted from the destination and the result is
  2666. stored in the destination.
  2667.  
  2668. Clocks Size
  2669. Operands 808x 286 386 486 Bytes
  2670.  
  2671. reg,reg 3 2 2 1 2
  2672. mem,reg 16+EA 7 6 3 2-4 (W88=24+EA)
  2673. reg,mem 9+EA 7 7 2 2-4 (W88=13+EA)
  2674. reg,immed 4 3 2 1 3-4
  2675. mem,immed 17+EA 7 7 3 3-6 (W88=25+EA)
  2676. accum,immed 4 3 2 1 2-3
  2677.  
  2678.  
  2679. TEST - Test For Bit Pattern
  2680.  
  2681. Usage: TEST dest,src
  2682. Modifies flags: CF OF PF SF ZF (AF undefined)
  2683.  
  2684. Performs a logical AND of the two operands updating the flags
  2685. register without saving the result.
  2686.  
  2687. Clocks Size
  2688. Operands 808x 286 386 486 Bytes
  2689.  
  2690. reg,reg 3 2 1 1 2
  2691. reg,mem 9+EA 6 5 1 2-4 (W88=13+EA)
  2692. mem,reg 9+EA 6 5 2 2-4 (W88=13+EA)
  2693. reg,immed 5 3 2 1 3-4
  2694. mem,immed 11+EA 6 5 2 3-6
  2695. accum,immed 4 3 2 1 2-3
  2696.  
  2697.  
  2698. VERR - Verify Read (286+ protected)
  2699.  
  2700. Usage: VERR src
  2701. Modifies flags: ZF
  2702.  
  2703. Verifies the specified segment selector is valid and is readable
  2704. at the current privilege level. If the segment is readable,
  2705. the Zero Flag is set, otherwise it is cleared.
  2706.  
  2707. Clocks Size
  2708. Operands 808x 286 386 486 Bytes
  2709.  
  2710. reg16 - 14 10 11 3
  2711. mem16 - 16 11 11 5
  2712.  
  2713.  
  2714. VERW - Verify Write (286+ protected)
  2715.  
  2716. Usage: VERW src
  2717. Modifies flags: ZF
  2718.  
  2719. Verifies the specified segment selector is valid and is ratable
  2720. at the current privilege level. If the segment is writable,
  2721. the Zero Flag is set, otherwise it is cleared.
  2722.  
  2723. Clocks Size
  2724. Operands 808x 286 386 486 Bytes
  2725.  
  2726. reg16 - 14 15 11 3
  2727. mem16 - 16 16 11 5
  2728. WAIT/FWAIT - Event Wait
  2729.  
  2730. Usage: WAIT
  2731. FWAIT
  2732. Modifies flags: None
  2733.  
  2734. CPU enters wait state until the coprocessor signals it has finished
  2735. its operation. This instruction is used to prevent the CPU from
  2736. accessing memory that may be temporarily in use by the coprocessor.
  2737. WAIT and FWAIT are identical.
  2738.  
  2739. Clocks Size
  2740. Operands 808x 286 386 486 Bytes
  2741.  
  2742. none 4 3 6+ 1-3 1
  2743.  
  2744.  
  2745. WBINVD - Write-Back and Invalidate Cache (486+)
  2746.  
  2747. Usage: WBINVD
  2748. Modifies flags: None
  2749.  
  2750. Flushes internal cache, then signals the external cache to write
  2751. back current data followed by a signal to flush the external cache.
  2752.  
  2753. Clocks Size
  2754. Operands 808x 286 386 486 Bytes
  2755.  
  2756. none - - - 5 2
  2757.  
  2758.  
  2759. XCHG - Exchange
  2760.  
  2761. Usage: XCHG dest,src
  2762. Modifies flags: None
  2763.  
  2764. Exchanges contents of source and destination.
  2765.  
  2766. Clocks Size
  2767. Operands 808x 286 386 486 Bytes
  2768.  
  2769. reg,reg 4 3 3 3 2
  2770. mem,reg 17+EA 5 5 5 2-4 (W88=25+EA)
  2771. reg,mem 17+EA 5 5 3 2-4 (W88=25+EA)
  2772. accum,reg 3 3 3 3 1
  2773. reg,accum 3 3 3 3 1
  2774.  
  2775.  
  2776. XLAT/XLATB - Translate
  2777.  
  2778. Usage: XLAT translation-table
  2779. XLATB (masm 5.x)
  2780. Modifies flags: None
  2781.  
  2782. Replaces the byte in AL with byte from a user table addressed by
  2783. BX. The original value of AL is the index into the translate table.
  2784. The best way to discripe this is MOV AL,[BX+AL]
  2785.  
  2786. Clocks Size
  2787. Operands 808x 286 386 486 Bytes
  2788.  
  2789. table offset 11 5 5 4 1
  2790. XOR - Exclusive OR
  2791.  
  2792. Usage: XOR dest,src
  2793. Modifies flags: CF OF PF SF ZF (AF undefined)
  2794.  
  2795. Performs a bitwise exclusive OR of the operands and returns
  2796. the result in the destination.
  2797.  
  2798. Clocks Size
  2799. Operands 808x 286 386 486 Bytes
  2800.  
  2801. reg,reg 3 2 2 1 2
  2802. mem,reg 16+EA 7 6 3 2-4 (W88=24+EA)
  2803. reg,mem 9+EA 7 7 2 2-4 (W88=13+EA)
  2804. reg,immed 4 3 2 1 3-4
  2805. mem,immed 17+EA 7 7 3 3-6 (W88=25+EA)
  2806. accum,immed 4 3 2 1 2-3
  2807. 
Advertisement
Add Comment
Please, Sign In to add comment
Advertisement
Public Pastes
Advertisement
We use cookies for various purposes including analytics. By continuing to use Pastebin, you agree to our use of cookies as described in the Cookies Policy.  OK, I Understand
Not a member of Pastebin yet?
Sign Up, it unlocks many cool features!