mips, asm

#include "Munch.h"
#include "Assem.h"
#include "RegAlloc.h"

#include <cstdarg>
#include <assert.h>
#include <string>

using namespace std;


static list<AS_instr> il;

string toString(int value)
{
    char buffer[15];
    sprintf(buffer, "%d", value);
    return buffer;
}


void emit(AS_instr instruction)
{
    il.push_back(instruction);
}


list<AS_instr>* getInstructionList()
{
    return &il;
}


Regs LL(Reg reg, ...)
{
    va_list arglist;
    va_start(arglist, reg);

    Regs reglist = new list<Reg>();

    while (reg != (Reg)-1)
    {
        reglist->push_back(reg);
        reg = va_arg(arglist, Reg);
    }

    va_end(arglist);

    return reglist;
}


void munchStm(T_stm s)
{
    switch (s->kind)
    {
        case T_MOVE:
        {
            T_exp dstExp = s->u.MOVE.dst;
            T_exp srcExp = s->u.MOVE.src;

            if (dstExp->kind == T_MEM)
            {
                if (dstExp->u.MEM->kind == T_BINOP)
                {
                    if (dstExp->u.MEM->u.BINOP.op == T_PLUS)
                    {
                        if (dstExp->u.MEM->u.BINOP.right->kind == T_CONST)
                        {
                            T_exp e1 = srcExp;
                            T_exp e2 = dstExp->u.MEM->u.BINOP.left;
                            T_exp c = dstExp->u.MEM->u.BINOP.right;

                            string assem = "sw `s," + toString(c->u.CONST) + "(`s)";

                            AS_instr instr = AS_Oper(assem, NULL, LL(munchExp(e1), munchExp(e2), -1));
                            emit(instr);
                        }
                        else if (dstExp->u.MEM->u.BINOP.left->kind == T_CONST)
                        {
                            T_exp e1 = srcExp;
                            T_exp e2 = dstExp->u.MEM->u.BINOP.right;
                            T_exp c = dstExp->u.MEM->u.BINOP.left;

                            string assem = "sw `s," + toString(c->u.CONST) + "(`s)";

                            AS_instr instr = AS_Oper(assem, NULL, LL(munchExp(e1), munchExp(e2), -1));
                            emit(instr);
                        }
                        else
                        {
                            T_exp e1 = srcExp;

                            AS_instr instr = AS_Oper("sw `s,0(`s)", NULL, LL(munchExp(e1), munchExp(dstExp->u.MEM), -1));
                            emit(instr);
                        }
                    }
                    else
                    {
                        T_exp e1 = srcExp;

                        AS_instr instr = AS_Oper("sw `s,0(`s)", NULL, LL(munchExp(e1), munchExp(dstExp->u.MEM), -1));
                        emit(instr);
                    }
                }
                else if (dstExp->u.MEM->kind == T_CONST)
                {
                    T_exp e1 = srcExp;

                    string assem = "sw `s," + toString(dstExp->u.MEM->u.CONST) + "($zero)";

                    AS_instr instr = AS_Oper(assem, NULL, LL(munchExp(e1), -1));
                    emit(instr);
                }
                else
                {
                    T_exp e1 = srcExp;

                    AS_instr instr = AS_Oper("sw `s,0(`s)", NULL, LL(munchExp(e1), munchExp(dstExp->u.MEM), -1));
                    emit(instr);
                }
            }
            else
            {
                assert(0);
            }
        }
        break;


        case T_SEQ:
        {
            T_stm left = s->u.SEQ.left;
            T_stm right = s->u.SEQ.right;

            munchStm(left);
            munchStm(right);
        }
        break;


        case T_EXP:
        {
            T_exp exp = s->u.EXP;
            munchExp(exp);
        }
        break;


        default:
            assert(0);
    }
}


Reg munchExp(T_exp e)
{
    switch (e->kind)
    {
case T_MEM:
{
    // Here goes the code for lw instruction
    if (e->u.MEM->kind == T_BINOP)
    {
        if (e->u.MEM->u.BINOP.op == T_PLUS)
        {
            if (e->u.MEM->u.BINOP.right->kind == T_CONST && e->u.MEM->u.BINOP.left->kind == T_TEMP)
                {
                    T_exp Right = e->u.MEM->u.BINOP.right;
                    T_exp Left = e->u.MEM->u.BINOP.left;
                    Reg reg = getNewReg();
                    string assem = "lw `d," + toString(Right->u.CONST) + "(`s)";
                    AS_instr instr = AS_Oper(assem, LL(reg, -1), LL(munchExp(Left), -1));
                    emit(instr);

                    return reg;
                }
            else if (e->u.MEM->u.BINOP.left->kind == T_CONST && e->u.MEM->u.BINOP.right->kind == T_TEMP)
            {
                T_exp Right = e->u.MEM->u.BINOP.right;
                T_exp Left = e->u.MEM->u.BINOP.left;
                Reg reg = getNewReg();
                string assem = "lw `d," + toString(Left->u.CONST) + "(`s)";
                AS_instr instr = AS_Oper(assem, LL(reg, -1), LL(munchExp(Right), -1));
                emit(instr);

                return reg;
            }
        }
    }
    else if (e->u.MEM->kind == T_CONST)
    {
        int Const = e->u.MEM->u.CONST;
        Reg reg = getNewReg();
        string assem = "lw `d," + toString(Const) + "($zero) ";
        AS_instr instr = AS_Oper(assem, LL(reg, -1), NULL);
        emit(instr);

        return reg;
    }
    else
    {
        Reg reg = getNewReg();
        string assem= "lw `d," +toString(0) + "(`s)";
        AS_instr instr = AS_Oper(assem, LL(reg, -1), LL(reg, -1));
        emit(instr);

        return reg;
    }
}
break;


        case T_BINOP:
        {
            if (e->u.BINOP.op == T_PLUS)
            {
                if (e->u.BINOP.right->kind == T_CONST)
                {
                    T_exp e1 = e->u.BINOP.left;
                    T_exp c = e->u.BINOP.right;
                    Reg reg = getNewReg();

                    string assem = "addi `d,`s, " + toString(c->u.CONST);

                    AS_instr instr = AS_Oper(assem, LL(reg, -1), LL(munchExp(e1), -1));
                    emit(instr);
                    return reg;
                }
                else if (e->u.BINOP.left->kind == T_CONST)
                {
                    T_exp e1 = e->u.BINOP.right;
                    T_exp c = e->u.BINOP.left;
                    Reg reg = getNewReg();

                    string assem = "addi `d,`s," + toString(c->u.CONST);

                    AS_instr instr = AS_Oper(assem, LL(reg, -1), LL(munchExp(e1), -1));
                    emit(instr);
                    return reg;
                }
            }
            else
            {
                assert(0);
                return NULL;
            }
        }
        break;


        case T_TEMP:
        {
            return e->u.TEMP;
        }
        break;


        case T_CONST:
        {
            Reg reg = getNewReg();

            string assem = "li `d, " + toString(e->u.CONST);

            AS_instr instr = AS_Oper(assem, LL(reg, -1), NULL);
            emit(instr);
            return reg;
        }
        break;


        case T_ESEQ:
        {
            Reg reg = munchExp(e->u.ESEQ.exp);
            munchStm(e->u.ESEQ.stm);

            return reg;
        }
        break;

        default:
            assert(0);
            return NULL;
    }
}