Viterbi decoder Design source code

module viterbi(input [3:0] a, input clk, en, output reg [1:0] s, output reg serial_out);
    reg [1:0] err1, err2;
    reg [1:0] cmp1, cmp2;
    reg m1, m2, m3, m4, m11, m22, m33, m44;
    reg [2:0] bm1, bm2, bm3, bm4, bm11, bm22, bm33, bm44;
    reg [2:0] em1, em2, em3, em4, em11, em22, em33, em44;
    reg [2:0] p1, p2;
    reg c;

    always @(posedge clk) begin
        if (en == 1) c = 0;
        if (c == 0) begin
            serial_out = s[0];
            err1 = 2'b00 ^ a[3:2];
            err2 = 2'b11 ^ a[3:2];
            countones(err1, cmp1);
            countones(err2, cmp2);
            if (cmp2 < cmp1) begin
                em1 = cmp2;
                bm1 = 2;
                m1 = 0;
            end else begin
                em1 = cmp1;
                bm1 = 1;
                m1 = 0;
            end

            err1 = 2'b10 ^ a[3:2];
            err2 = 2'b01 ^ a[3:2];
            countones(err1, cmp1);
            countones(err2, cmp2);
            if (cmp2 < cmp1) begin
                em2 = cmp2;
                bm2 = 4;
                m2 = 0;
            end else begin
                em2 = cmp1;
                bm2 = 3;
                m2 = 0;
            end

            err1 = 2'b11 ^ a[3:2];
            err2 = 2'b00 ^ a[3:2];
            countones(err1, cmp1);
            countones(err2, cmp2);
            if (cmp2 < cmp1) begin
                em3 = cmp2;
                bm3 = 2;
                m3 = 1;
            end else begin
                em3 = cmp1;
                bm3 = 1;
                m3 = 1;
            end

            err1 = 2'b01 ^ a[3:2];
            err2 = 2'b10 ^ a[3:2];
            countones(err1, cmp1);
            countones(err2, cmp2);
            if (cmp2 < cmp1) begin
                em4 = cmp2;
                bm4 = 4;
                m4 = 1;
            end else begin
                em4 = cmp1;
                bm4 = 3;
                m4 = 1;
            end
            c = 1;
        end else if (c == 1) begin
            err1 = 2'b00 ^ a[1:0];
            err2 = 2'b11 ^ a[1:0];
            countones(err1, cmp1);
            countones(err2, cmp2);
            cmp1 = cmp1 + em1;
            cmp2 = cmp2 + em2;
            if (cmp2 < cmp1) begin
                em11 = cmp2;
                bm11 = 2;
                m11 = 0;
            end else begin
                em11 = cmp1;
                bm11 = 1;
                m11 = 0;
            end

            err1 = 2'b10 ^ a[1:0];
            err2 = 2'b01 ^ a[1:0];
            countones(err1, cmp1);
            countones(err2, cmp2);
            cmp1 = cmp1 + em3;
            cmp2 = cmp2 + em4;
            if (cmp2 < cmp1) begin
                em22 = cmp2;
                bm22 = 4;
                m22 = 0;
            end else begin
                em22 = cmp1;
                bm22 = 3;
                m22 = 0;
            end

            err1 = 2'b11 ^ a[1:0];
            err2 = 2'b00 ^ a[1:0];
            countones(err1, cmp1);
            countones(err2, cmp2);
            cmp1 = cmp1 + em1;
            cmp2 = cmp2 + em2;
            if (cmp2 < cmp1) begin
                em33 = cmp2;
                bm33 = 2;
                m33 = 1;
            end else begin
                em33 = cmp1;
                bm33 = 1;
                m33 = 1;
            end

            err1 = 2'b01 ^ a[1:0];
            err2 = 2'b10 ^ a[1:0];
            countones(err1, cmp1);
            countones(err2, cmp2);
            cmp1 = cmp1 + em3;
            cmp2 = cmp2 + em4;
            if (cmp2 < cmp1) begin
                em44 = cmp2;
                bm44 = 4;
                m44 = 1;
            end else begin
                em44 = cmp1;
                bm44 = 3;
                m44 = 1;
            end

            if ((em11 <= em22) && (em11 <= em33) && (em11 <= em44)) p2 = bm11;
            else if ((em22 <= em11) && (em22 <= em33) && (em22 <= em44)) p2 = bm22;
            else if ((em33 <= em11) && (em33 <= em22) && (em33 <= em44)) p2 = bm33;
            else p2 = bm44;

            if (p2 == bm11)
                s[0] = m11;
            else if (p2 == bm22)
                s[0] = m22;
            else if (p2 == bm33)
                s[0] = m33;
            else
                s[0] = m44;

            case(p2)
                1: p1 = bm1;
                2: p1 = bm2;
                3: p1 = bm3;
                4: p1 = bm4;
                default: p1 = bm1;
            endcase

            if (p1 == bm1)
                s[1] = m1;
            else if (p1 == bm2)
                s[1] = m2;
            else if (p1 == bm3)
                s[1] = m3;
            else
                s[1] = m4;
            c = 0;
            serial_out = s[1];
        end
    end

    task countones;
        input [1:0] in;
        output reg [1:0] ones;
        integer i;
        begin
            ones = 0;                    //initialize count variable.
            for (i = 0; i < 2; i = i + 1) begin     //for all the bits.
                ones = ones + in[i];         //Add the bit to the count.
            end
        end
    endtask
endmodule