B

library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;

entity zadatakB is
    Port ( iCLK    : in  std_logic;
           iRST    : in  std_logic;
           iEN     : in  std_logic;
              iDATA  : in std_logic_vector(7 downto 0);
              iLOAD   : in std_logic;
              oCODE  : out std_logic_vector(2 downto 0);
              oCNTG   : out std_logic_vector(3 downto 0);
              oCNTS   : out std_logic_vector(3 downto 0)
             );
end entity;

architecture Behavioral of zadatakB is

    signal sCOMP : std_logic_vector(7 downto 0);
    signal sROR  : std_logic_vector(7 downto 0);
    signal sENG  : std_logic;
    signal sENS  : std_logic;
    signal sCODE : std_logic_vector(2 downto 0);
    signal sCNTG : std_logic_vector(3 downto 0);
    signal sCNTS : std_logic_vector(3 downto 0);

begin

    --komplementer
    sCOMP <= not(iDATA) + 1;

    --rotirajuci registar
    process (iCLK) begin
        if (rising_edge(iCLK)) then
            if (iRST = '1') then
                sROR <= (others => '0');
            else
                if (iLOAD = '1') then
                    sROR <= sCOMP;
                elsif (iEN = '1') then
                    sROR <= sROR(6 downto 0) & sROR(7);
                end if;
            end if;
        end if;
    end process;

    --prioritetni koder
    sCODE <= "111" when sROR(7) = '1' else
                "110" when sROR(6) = '1' else
                "101" when sROR(5) = '1' else
                "100" when sROR(4) = '1' else
                "011" when sROR(3) = '1' else
                "010" when sROR(2) = '1' else
                "001" when sROR(1) = '1' else
                "000";

    oCODE <= sCODE;

    --komparator
    --pokusaj sa ifom
    sENG <= '1' when sROR > 5 else '0';
    sENS <= not(sENG);

    --brojac vecih
    process (iCLK) begin
        if (rising_edge(iCLK)) then
            if (iRST = '1') then
                sCNTG <= (others => '0');
            elsif (sENG = '1') then
                sCNTG <= sCNTG + 1;
            end if;
        end if;
    end process;

    --brojac manjih
    process (iCLK) begin
        if (rising_edge(iCLK)) then
            if (iRST = '1') then
                sCNTS <= (others => '0');
            elsif (sENS = '1') then
                sCNTS <= sCNTS + 1;
            end if;
        end if;
    end process;

    oCNTG <= sCNTG;
    oCNTS <= sCNTS;

end Behavioral;