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#include "am5729-beagleboneai.dts"
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#include "bbai-pins.h"  // https://pastebin.com/vwn4m7Nf
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&{/chosen} {
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	base_dtb = "bbai-custom.dts";	// <-- name of this file goes here
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	base_dtb = "bbai-uart5.dts";	// <-- name of this file goes here
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};
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&dra7_pmx_core {
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	uart5_pins: uart5 {
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		pinctrl-single,pins = <
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			DRA7XX_CORE_IOPAD( P9_13,  PIN_OUTPUT       | MUX_MODE4  ) // txd
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			DRA7XX_CORE_IOPAD( P9_11A, PIN_INPUT_PULLUP | MUX_MODE4  ) // rxd
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			DRA7XX_CORE_IOPAD( P9_11B, PIN_OUTPUT       | MUX_MODE15 ) // (shared pin)
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		>;
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	};
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};
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// ttyS4
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&uart5 {
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	status = "okay";
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	pinctrl-names = "default";
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	pinctrl-0 = <&uart5_pins>;
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};
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// Here's the obnoxious part: since u-boot doesn't have sane pin defaults yet, all pins not  
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// explicitly setup above should be overridden here.  This will eventually no longer be needed.  
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&cape_pins_default {
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	pinctrl-single,pins = <
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	//	DRA7XX_CORE_IOPAD( P9_11A, PIN_INPUT_PULLDOWN | MUX_MODE15 )  // note: has no gpio
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	//	DRA7XX_CORE_IOPAD( P9_11B, PIN_INPUT          | MUX_MODE14 )
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		DRA7XX_CORE_IOPAD( P9_12,  PIN_INPUT_PULLDOWN | MUX_MODE14 )
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	//	DRA7XX_CORE_IOPAD( P9_13,  PIN_INPUT_PULLDOWN | MUX_MODE15 )  // note: has no gpio
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		DRA7XX_CORE_IOPAD( P9_14,  PIN_INPUT_PULLDOWN | MUX_MODE14 )
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		DRA7XX_CORE_IOPAD( P9_15,  PIN_INPUT_PULLDOWN | MUX_MODE14 )
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		DRA7XX_CORE_IOPAD( P9_16,  PIN_INPUT_PULLDOWN | MUX_MODE14 )
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		DRA7XX_CORE_IOPAD( P9_17A, PIN_INPUT_PULLDOWN | MUX_MODE14 )
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		DRA7XX_CORE_IOPAD( P9_17B, PIN_INPUT          | MUX_MODE14 )
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		DRA7XX_CORE_IOPAD( P9_18A, PIN_INPUT_PULLDOWN | MUX_MODE14 )
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		DRA7XX_CORE_IOPAD( P9_18B, PIN_INPUT          | MUX_MODE14 )
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		DRA7XX_CORE_IOPAD( P9_19A, PIN_INPUT_PULLUP   | MUX_MODE14 )
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		DRA7XX_CORE_IOPAD( P9_19B, PIN_INPUT          | MUX_MODE14 )
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		DRA7XX_CORE_IOPAD( P9_20A, PIN_INPUT_PULLUP   | MUX_MODE14 )
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		DRA7XX_CORE_IOPAD( P9_20B, PIN_INPUT          | MUX_MODE14 )
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		DRA7XX_CORE_IOPAD( P9_21A, PIN_INPUT_PULLDOWN | MUX_MODE14 )
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		DRA7XX_CORE_IOPAD( P9_21B, PIN_INPUT          | MUX_MODE14 )
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		DRA7XX_CORE_IOPAD( P9_22A, PIN_INPUT_PULLDOWN | MUX_MODE14 )
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		DRA7XX_CORE_IOPAD( P9_22B, PIN_INPUT          | MUX_MODE14 )
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		DRA7XX_CORE_IOPAD( P9_23,  PIN_INPUT_PULLUP   | MUX_MODE14 )
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		DRA7XX_CORE_IOPAD( P9_24,  PIN_INPUT_PULLUP   | MUX_MODE14 )
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		DRA7XX_CORE_IOPAD( P9_25,  PIN_INPUT_PULLDOWN | MUX_MODE14 )
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		DRA7XX_CORE_IOPAD( P9_26A, PIN_INPUT_PULLUP   | MUX_MODE14 )
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		DRA7XX_CORE_IOPAD( P9_26B, PIN_INPUT          | MUX_MODE14 )
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		DRA7XX_CORE_IOPAD( P9_27A, PIN_INPUT_PULLDOWN | MUX_MODE14 )
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		DRA7XX_CORE_IOPAD( P9_27B, PIN_INPUT          | MUX_MODE14 )
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		DRA7XX_CORE_IOPAD( P9_28,  PIN_INPUT_PULLDOWN | MUX_MODE14 )
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		DRA7XX_CORE_IOPAD( P9_29A, PIN_INPUT_PULLDOWN | MUX_MODE14 )
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		DRA7XX_CORE_IOPAD( P9_29B, PIN_INPUT          | MUX_MODE14 )
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		DRA7XX_CORE_IOPAD( P9_30,  PIN_INPUT_PULLDOWN | MUX_MODE14 )
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		DRA7XX_CORE_IOPAD( P9_31A, PIN_INPUT_PULLDOWN | MUX_MODE14 )
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		DRA7XX_CORE_IOPAD( P9_31B, PIN_INPUT          | MUX_MODE14 )
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		DRA7XX_CORE_IOPAD( P9_41A, PIN_INPUT_PULLDOWN | MUX_MODE14 )
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		DRA7XX_CORE_IOPAD( P9_41B, PIN_INPUT          | MUX_MODE14 )
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		DRA7XX_CORE_IOPAD( P9_42A, PIN_INPUT_PULLDOWN | MUX_MODE14 )
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		DRA7XX_CORE_IOPAD( P9_42B, PIN_INPUT          | MUX_MODE14 )
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		DRA7XX_CORE_IOPAD( P8_03,  PIN_INPUT_PULLUP   | MUX_MODE14 )
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		DRA7XX_CORE_IOPAD( P8_04,  PIN_INPUT_PULLUP   | MUX_MODE14 )
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		DRA7XX_CORE_IOPAD( P8_05,  PIN_INPUT_PULLUP   | MUX_MODE14 )
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		DRA7XX_CORE_IOPAD( P8_06,  PIN_INPUT_PULLUP   | MUX_MODE14 )
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		DRA7XX_CORE_IOPAD( P8_07,  PIN_INPUT_PULLDOWN | MUX_MODE14 )
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		DRA7XX_CORE_IOPAD( P8_08,  PIN_INPUT_PULLDOWN | MUX_MODE14 )
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		DRA7XX_CORE_IOPAD( P8_09,  PIN_INPUT_PULLDOWN | MUX_MODE14 )
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		DRA7XX_CORE_IOPAD( P8_10,  PIN_INPUT_PULLDOWN | MUX_MODE14 )
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		DRA7XX_CORE_IOPAD( P8_11,  PIN_INPUT_PULLDOWN | MUX_MODE14 )
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		DRA7XX_CORE_IOPAD( P8_12,  PIN_INPUT_PULLDOWN | MUX_MODE14 )
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		DRA7XX_CORE_IOPAD( P8_13,  PIN_INPUT_PULLDOWN | MUX_MODE14 )
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		DRA7XX_CORE_IOPAD( P8_14,  PIN_INPUT_PULLDOWN | MUX_MODE14 )
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		DRA7XX_CORE_IOPAD( P8_15A, PIN_INPUT_PULLDOWN | MUX_MODE14 )
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		DRA7XX_CORE_IOPAD( P8_15B, PIN_INPUT          | MUX_MODE14 )
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		DRA7XX_CORE_IOPAD( P8_16,  PIN_INPUT_PULLDOWN | MUX_MODE14 )
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		DRA7XX_CORE_IOPAD( P8_17,  PIN_INPUT_PULLDOWN | MUX_MODE14 )
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		DRA7XX_CORE_IOPAD( P8_18,  PIN_INPUT_PULLDOWN | MUX_MODE14 )
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		DRA7XX_CORE_IOPAD( P8_19,  PIN_INPUT_PULLDOWN | MUX_MODE14 )
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		DRA7XX_CORE_IOPAD( P8_20,  PIN_INPUT_PULLUP   | MUX_MODE14 )
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		DRA7XX_CORE_IOPAD( P8_21,  PIN_INPUT_PULLUP   | MUX_MODE14 )
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		DRA7XX_CORE_IOPAD( P8_22,  PIN_INPUT_PULLUP   | MUX_MODE14 )
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		DRA7XX_CORE_IOPAD( P8_23,  PIN_INPUT_PULLUP   | MUX_MODE14 )
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		DRA7XX_CORE_IOPAD( P8_24,  PIN_INPUT_PULLUP   | MUX_MODE14 )
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		DRA7XX_CORE_IOPAD( P8_25,  PIN_INPUT_PULLUP   | MUX_MODE14 )
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		DRA7XX_CORE_IOPAD( P8_26,  PIN_INPUT_PULLDOWN | MUX_MODE14 )
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		DRA7XX_CORE_IOPAD( P8_27A, PIN_INPUT_PULLDOWN | MUX_MODE14 )
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		DRA7XX_CORE_IOPAD( P8_27B, PIN_INPUT          | MUX_MODE14 )
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		DRA7XX_CORE_IOPAD( P8_28A, PIN_INPUT_PULLDOWN | MUX_MODE14 )
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		DRA7XX_CORE_IOPAD( P8_28B, PIN_INPUT          | MUX_MODE14 )
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		DRA7XX_CORE_IOPAD( P8_29A, PIN_INPUT_PULLDOWN | MUX_MODE14 )
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		DRA7XX_CORE_IOPAD( P8_29B, PIN_INPUT          | MUX_MODE14 )
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		DRA7XX_CORE_IOPAD( P8_30A, PIN_INPUT_PULLDOWN | MUX_MODE14 )
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		DRA7XX_CORE_IOPAD( P8_30B, PIN_INPUT          | MUX_MODE14 )
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		DRA7XX_CORE_IOPAD( P8_31A, PIN_INPUT_PULLDOWN | MUX_MODE14 )
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		DRA7XX_CORE_IOPAD( P8_31B, PIN_INPUT_PULLDOWN | MUX_MODE15 )  // note: has no gpio
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		DRA7XX_CORE_IOPAD( P8_32A, PIN_INPUT_PULLDOWN | MUX_MODE14 )
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		DRA7XX_CORE_IOPAD( P8_32B, PIN_INPUT_PULLDOWN | MUX_MODE15 )  // note: has no gpio
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		DRA7XX_CORE_IOPAD( P8_33A, PIN_INPUT_PULLDOWN | MUX_MODE14 )
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		DRA7XX_CORE_IOPAD( P8_33B, PIN_INPUT          | MUX_MODE14 )
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		DRA7XX_CORE_IOPAD( P8_34A, PIN_INPUT_PULLDOWN | MUX_MODE14 )
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		DRA7XX_CORE_IOPAD( P8_34B, PIN_INPUT          | MUX_MODE14 )
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		DRA7XX_CORE_IOPAD( P8_35A, PIN_INPUT_PULLDOWN | MUX_MODE14 )
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		DRA7XX_CORE_IOPAD( P8_35B, PIN_INPUT          | MUX_MODE14 )
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		DRA7XX_CORE_IOPAD( P8_36A, PIN_INPUT_PULLDOWN | MUX_MODE14 )
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		DRA7XX_CORE_IOPAD( P8_36B, PIN_INPUT          | MUX_MODE14 )
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		DRA7XX_CORE_IOPAD( P8_37A, PIN_INPUT_PULLDOWN | MUX_MODE14 )
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		DRA7XX_CORE_IOPAD( P8_37B, PIN_INPUT_PULLDOWN | MUX_MODE15 )  // note: has no gpio
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		DRA7XX_CORE_IOPAD( P8_38A, PIN_INPUT_PULLDOWN | MUX_MODE14 )
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		DRA7XX_CORE_IOPAD( P8_38B, PIN_INPUT_PULLDOWN | MUX_MODE15 )  // note: has no gpio
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		DRA7XX_CORE_IOPAD( P8_39,  PIN_INPUT_PULLDOWN | MUX_MODE14 )
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		DRA7XX_CORE_IOPAD( P8_40,  PIN_INPUT_PULLDOWN | MUX_MODE14 )
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		DRA7XX_CORE_IOPAD( P8_41,  PIN_INPUT_PULLDOWN | MUX_MODE14 )
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		DRA7XX_CORE_IOPAD( P8_42,  PIN_INPUT_PULLDOWN | MUX_MODE14 )
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		DRA7XX_CORE_IOPAD( P8_43,  PIN_INPUT_PULLDOWN | MUX_MODE14 )
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		DRA7XX_CORE_IOPAD( P8_44,  PIN_INPUT_PULLDOWN | MUX_MODE14 )
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		DRA7XX_CORE_IOPAD( P8_45A, PIN_INPUT_PULLDOWN | MUX_MODE14 )
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		DRA7XX_CORE_IOPAD( P8_45B, PIN_INPUT          | MUX_MODE14 )
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		DRA7XX_CORE_IOPAD( P8_46A, PIN_INPUT_PULLDOWN | MUX_MODE14 )
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		DRA7XX_CORE_IOPAD( P8_46B, PIN_INPUT          | MUX_MODE14 )
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	>;
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};