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Madi_Classifier

Apr 18th, 2023
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VHDL 5.04 KB | None | 0 0
  1. library IEEE;
  2. use IEEE.STD_LOGIC_1164.ALL;
  3. use IEEE.STD_LOGIC_ARITH.ALL;
  4. use IEEE.STD_LOGIC_UNSIGNED.ALL;
  5.  
  6. entity classifier is
  7.     port (
  8.         -- Optional Clock
  9.         clk : in std_logic;
  10.         reset : in std_logic;
  11.        
  12.         -- Dataflow
  13.         data_out : out std_logic_vector(7 downto 0);
  14.         data_in : in std_logic_vector(7 downto 0);
  15.        
  16.         -- Receiver Comms
  17.         moved : in std_logic; -- On rising edge, receiver confirmed to have iterated
  18.         move_read : out std_logic; -- Request receiver increment pointer
  19.        
  20.         -- Transmitter Comms
  21.         move_ptr : in std_logic; -- Request to move read pointer
  22.         movedd : out std_logic; -- Request acknowledged and enacted. (send rising edge)
  23.        
  24.         -- Transmitter RAM controls
  25.         write_ptr : out std_logic_vector(1 downto 0);
  26.         read_ptr : out std_logic_vector(1 downto 0)
  27.     );
  28. end entity classifier;
  29.  
  30. architecture Behavioral of classifier is
  31.     -- Enumerated type for FSM states
  32.         -- Classifier
  33.         type state_type is (LOAD_DATA, CLASSIFICATION, SEND_DATA, TRANSMITTER_COMMS);
  34.         signal current_state_dataflow, next_state_dataflow : state_type;
  35.        
  36.         -- Transmitter Comms
  37.         type state_type is (IDLE, MOVEDD_rise, MOVEDD_fall, WAIT_MOVE_PTR);
  38.         signal current_state_comms, next_state_comms : state_type;
  39.    
  40.  -- Register to hold data for classification
  41.     signal classification_data_in, classification_data_out : std_logic_vector(7 downto 0);
  42. begin
  43.     -- FSM process
  44.     process (clk)
  45.     begin
  46.         if rising_edge(clk) then
  47.             if reset = '1' then
  48.                 current_state_dataflow <= LOAD_DATA; -- Initial state
  49.                 current_state_comms <= IDLE;
  50.             else
  51.                 current_state_dataflow <= next_state_dataflow; -- Update state
  52.                 current_state_comms <= next_state_comms;
  53.             end if;
  54.         end if;
  55.     end process;
  56.  
  57. ---------------------------------------------------------------
  58.    
  59.     -- FSM for receiver Comms
  60.         -- 1. when rising_edge(moved)
  61.             -- move_read <= '0';
  62.            
  63.     -- Receiver Comms FSM
  64.     process (moved)
  65.     begin
  66.         if rising_edge(moved) then
  67.             move_read <= '0';
  68.         end if;
  69.     end process;
  70.    
  71. ---------------------------------------------------------------
  72.  
  73.     -- FSM for Dataflow
  74.         -- Classification
  75.             -- 1. Load data from receiver RAM
  76.             -- 3. Perform Classification Algorithm
  77.             -- 4. Send data to Transmitter RAM
  78.        
  79.         -- Receiver Comms
  80.             -- 2. Set move_read <= '1';
  81.        
  82.         -- transmitter Comms
  83.             -- 5. Increment Transmitter write_ptr
  84.             -- 6. go back to 1.
  85.    
  86.     -- Dataflow FSM
  87.     process (current_state_dataflow, data_in, moved)
  88.     begin
  89.         -- Initialize next state to what the current state is
  90.         next_state_dataflow <= current_state_dataflow;
  91.        
  92.         case current_state_dataflow is
  93.             when LOAD_DATA =>
  94.                 -- Step 1: Load data from receiver RAM
  95.                 if move_read = '0' then
  96.                     classification_data_in <= data_in;
  97.                     move_read <= '1';
  98.                 end if;
  99.                
  100.                 next_state_dataflow <= CLASSIFICATION;
  101.             when CLASSIFICATION =>
  102.                 -- Step 3: Perform Classification Algorithm
  103.                     -- Code for classification algorithm here
  104.                         classification_data_out <= 0x"01" when to_integer(signed(classification_data_in)) > 128
  105.                                                     else 0x"00";
  106.                                                    
  107.                 next_state_dataflow <= SEND_DATA;
  108.             when SEND_DATA =>
  109.                 -- Step 4: Send data to Transmitter RAM
  110.                 data_out <= classification_data_out;
  111.                
  112.                 -- Step 5: Increment Transmitter write_ptr
  113.                 write_ptr <= write_ptr + 1;
  114.                
  115.                 next_state_dataflow <= LOAD_DATA;
  116.         end case;
  117.     end process;
  118.    
  119.     ---------------------------------------------------------------
  120.            
  121.     -- FSM for Transmitter Comms
  122.         -- 1. when move_ptr = '1'
  123.             -- 2. increment read_ptr
  124.             -- 3. Send rising_edge(moved);
  125.         -- 4. wait for move_ptr = '0'
  126.             -- Go back to 1.
  127.            
  128.     -- Transmitter Comms FSM
  129.     process(clk, current_state_comms, move_ptr, movedd)
  130.     begin
  131.         -- Initialize next state to what the current state is
  132.         next_state_comms <= current_state_comms;
  133.        
  134.         case current_state_comms is
  135.             when IDLE =>
  136.                 -- Step 1: when move_ptr = '1'
  137.                 if move_ptr = '1' then
  138.                     -- Step 2: increment read_ptr
  139.                     read_ptr <= read_ptr + 1;
  140.                    
  141.  
  142.                     next_state_comms <= MOVEDD_rise;
  143.                 end if;
  144.                
  145.             when MOVEDD_rise => -- Step 3: Send rising_edge(moved);
  146.                 if rising_edge(clk) then
  147.                     movedd <= '1';
  148.                     next_state_comms <= MOVEDD_fall;
  149.                 end if;
  150.                
  151.             when MOVEDD_fall =>-- Step 3: Send rising_edge(moved);
  152.            
  153.                 if falling_edge(clk) then
  154.                     movedd <= '0';
  155.                     next_state_comms <= WAIT_MOVE_PTR;
  156.                 end if;
  157.                
  158.             when WAIT_MOVE_PTR =>
  159.                 -- Step 4: wait for move_ptr = '0'
  160.                 if move_ptr = '0' then
  161.                     -- Go back to 1.
  162.                     next_state_comms <= IDLE;
  163.                 end if;
  164.         end case;
  165.     end process;
  166. end Behavioral;
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