Lab10 - Ej02 - ALU y su Testbench

module alu(
    input [2:0] S,
    input [3:0] A, B,
    output [3:0] F,
    input C, Z);

    reg [4:0] rF; // Tiene 1 bit adicional a propósito
    reg rC, rZ;

    always @ (S or A or B)
        case (S)
            3'b000:// output F is port A.
                begin
                    rF = 5'd0; // Borrar el reg rF por si el bit más significativo había quedado encendido
                    rF = A;
                end

            3'b001:// compare port A & port B.
                begin
                    rF = 5'd0;
                    rF = A - B;
                end
            3'b010: // output F is port B.
                begin
                    rF = 5'd0;
                    rF = B;;
                end
            3'b011: // output F is A + B.
                begin
                    rF = 5'd0;
                    rF = A + B;
                end
            3'b100: // output F is not(A and B) (NAND).
                begin
                    rF = 5'd0;
                    rF = ~(A & B);
                end
            default: // default case => everything is ZERO
                rF = 5'd0;
        endcase

    assign F = rF[3:0];
    assign C = rF[4];
    assign Z = rF[3:0] ? 1'b0 : 1'b1;

endmodule


module testbench();
    reg [2:0] S;
    reg [3:0] A, B;
    wire [3:0] F;
    wire C, Z;

    alu DUT(.S(S), .A(A), .B(B), .F(F), .C(C), .Z(Z)); // DUT = Device Under Test

    initial
    #100 $finish;

    initial
        begin
            $monitor("%d\t%d\t%d\t%d\t%d\t%d", S, A, B, F, C, Z); // Los valores están desplegados en decimal para facilitar la lectura

            // Test if A === B
            #1
            $display("\n\n------------ Test if A === B ------------");
            $display("S:\tA:\tB:\tF:\tC:\tZ");
            A = 4;
            B = 4;
            S = 0; $display("F = A");
            #1 S = 1; $display("F = A - B / CPMX");
            #1 S = 2; $display("F = B");
            #1 S = 3; $display("F = A + B");
            #1 S = 4; $display("F = not(A and B)");


            // Test if A > B, no overflow
            #1
            $display("\n\n------- Test if A > B, no overflow ------");
            $display("S:\tA:\tB:\tF:\tC:\tZ");
            A = 4;
            B = 2;
            S = 0; $display("F = A");
            #1 S = 1; $display("F = A - B / CPMX");
            #1 S = 2; $display("F = B");
            #1 S = 3; $display("F = A + B");
            #1 S = 4; $display("F = not(A and B)");


            // Test if A > B, with overflow
            #1
            $display("\n\n----- Test if A > B, with overflow ------");
            $display("S:\tA:\tB:\tF:\tC:\tZ");
            A = 10;
            B = 9;
            S = 0; $display("F = A");
            #1 S = 1; $display("F = A - B / CPMX");
            #1 S = 2; $display("F = B");
            #1 S = 3; $display("F = A + B");
            #1 S = 4; $display("F = not(A and B)");


            // Test if A < B, no overflow
            #1
            $display("\n\n------- Test if A < B, no overflow ------");
            $display("S:\tA:\tB:\tF:\tC:\tZ");
            A = 2;
            B = 4;
            S = 0; $display("F = A");
            #1 S = 1; $display("F = A - B / CPMX");
            #1 S = 2; $display("F = B");
            #1 S = 3; $display("F = A + B");
            #1 S = 4; $display("F = not(A and B)");
        end
endmodule