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- Left: x = (n<=-32768 ? -32768 : (n>32767 ? 32767 : n));
- Right: x = ((short)n != n) ? (n>>31) ^ 0x7FFF : n;
- X86_64:
- CMP EDI, -32768 MOV EAX, EDI
- MOV EAX, 32767 MOVSX EDX, DI
- CMOVG EDI, EAX SAR EAX, 31
- MOV EAX, -32768 XOR AX, 32767
- CMP EDI, -32768 CMP EDI, EDX
- CMOVL EDI, EAX CMOVNE EDI, EAX
- ARMV6 (ARM):
- SSAT R0, #16, R0 SXTH R3, R0
- SXTH R0, R0 CMP R0, R3
- LDRNE R3, .L7
- EORNE R3, R3, R0, ASR #31
- ...
- .L7: .WORD 32767
- ARMV6-M (THUMB):
- LDR R3, .L5 SXTH R3, R0
- CMP R0, R3 CMP R0, R3
- BLE .L2 BEQ .L8
- MOVS R0, R3 LDR R3, .L9
- .L2: LDR R3, .L5+4 ASRS R0, R0, #31
- CMP R0, R3 EORS R3, R0
- BGE .L3 .L8: ...
- MOVS R0, R3 .L9: .WORD 32767
- .L3: SXTH R0, R0
- ...
- .L5: .WORD 32767, -32768
- ARMV7VE and ARMV8-A (ARM):
- SSAT R0, #16, R0 SXTH R3, R0
- SXTH R0, R0 CMP R0, R3
- ASRNE R0, R0, #31
- EORNE R3, R0, #32512
- EORNE R3, R3, #255
- ARMV7VE and ARMV8-A (THUMB):
- SSAT R0, #16, R0 SXTH R3, R0
- SXTH R0, R0 CMP R0, R3
- ITT NE
- MOVWNE R3, #32767
- EORNE R3, R3, R0, ASR #31
- NVCC (NVidia Cuda compiler)
- ld.param.u32 %r1, [_Z6clamp1i_param_0]; ld.param.u32 %r1, [_Z6clamp2i_param_0];
- setp.lt.s32 %p1, %r1, -32767; cvt.s32.s16 %r2, %r1;
- setp.gt.s32 %p2, %r1, 32767; setp.eq.s32 %p1, %r2, %r1;
- cvt.u16.u32 %rs1, %r1; shr.s32 %r3, %r1, 31;
- selp.b16 %rs2, 32767, %rs1, %p2; xor.b32 %r4, %r3, 32767;
- selp.b16 %rs3, -32768, %rs2, %p1; selp.b32 %r5, %r1, %r4, %p1;
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