DNOLAB_5_6

--FUNCTION_DESCRIPTION
--NOT
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.all;
entity N is
port(
    a1: in STD_LOGIC;
    b1: out STD_LOGIC);
end N;
architecture archN of N is
begin
    b1 <= not a1 after 1 ns;
end archN;
--NA2
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.all;
entity NA2 is
port(
    a1, a2: in STD_LOGIC;
    b1: out STD_LOGIC);
end NA2;
architecture archNA2 of NA2 is
begin
    b1 <= not(a1 and a2) after 2 ns;
end archNA2;
--NOA22
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.all;
entity NOA22 is
port(
    a1, a2, a3, a4: in STD_LOGIC;
    b1: out STD_LOGIC);
end NOA22;
architecture archNOA22 of NOA22 is
begin
    b1 <= not((a1 and a2) or (a3 and a4)) after 4 ns;
end archNOA22;

--DEVICE_DESCRIPTION
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.all;
entity TRIG is
port(
    D, S, C: in STD_LOGIC;
    Q: out STD_LOGIC);
end TRIG;
architecture archTRIG of TRIG is
component N
port(
    a1: in STD_LOGIC;
    b1: out STD_LOGIC);
end component;
component NA2
port(
    a1, a2: in STD_LOGIC;
    b1: out STD_LOGIC);
end component;
component NOA22
port(
    a1, a2, a3, a4: in STD_LOGIC;
    b1: out STD_LOGIC);
end component;
signal za1, za2, zb1, zb2, zc1: STD_LOGIC;
begin
A_1:N port map(S,za1);
A_2:N port map(C,za2);
B_1:NOA22 port map(zc1,za1,D,zb2,zb1);
B_2:N port map(za2,zb2);
C_1:NA2 port map(za1,zb1,zc1);
C_2:N port map(zb1,Q);
end archTRIG;

--TEST_DESCRIPTION
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.all;
entity testTRIG is
end testTRIG;
architecture archtestTRIG of testTRIG is
component TRIG
port(
    D, S, C: in STD_LOGIC;
    Q: out STD_LOGIC);
end component;
signal D, S, C, Q: STD_LOGIC;
begin
--D <= '0','1' after 80 ns,'0' after 160 ns,'1' after 240 ns,'0' after 320 ns,'1' after 400 ns;
--S <= '1','0' after 80 ns,'1' after 240 ns,'0' after 320 ns;
--C <= '0','1' after 80 ns,'0' after 160 ns,'1' after 320 ns,'0' after 400 ns;
D <= '0','1' after 80 ns,'0' after 160 ns,'1' after 320 ns;
S <= '1','0' after 160 ns;
C <= '0','1' after 160 ns,'0' after 240 ns,'1' after 320 ns,'0' after 400 ns;
final: TRIG port map(D, S, C, Q);
end archtestTRIG;