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Wielder2927

constant_constraint_test

Dec 20th, 2023
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SystemVerilog 1.10 KB | Source Code | 0 0
  1. typedef logic signed [2:0] symbol_t;
  2.  
  3. typedef struct packed {
  4.   symbol_t A;
  5.   symbol_t B;
  6.   symbol_t C;
  7.   symbol_t D;
  8. } symbol_vector_t;
  9.  
  10. typedef symbol_vector_t symbol_vector_set_t[];
  11.  
  12. localparam symbol_vector_set_t CSEXTEND_PARAMETER = '{
  13.     '{+2, 0, 0,+2},
  14.     '{+2,+2,+1,+1},
  15.     '{+1,+2,+2,+1},
  16.     '{+1,+2,+1,+2},
  17.     '{+2, 0,+2,+1},
  18.     '{+2, 0,+1,+2},
  19.     '{+1, 0,+2,+2},
  20.     '{+2,+1, 0,+2}
  21.   };
  22.  
  23. static const symbol_vector_set_t CSEXTEND_SET = '{
  24.     '{+2, 0, 0,+2},
  25.     '{+2,+2,+1,+1},
  26.     '{+1,+2,+2,+1},
  27.     '{+1,+2,+1,+2},
  28.     '{+2, 0,+2,+1},
  29.     '{+2, 0,+1,+2},
  30.     '{+1, 0,+2,+2},
  31.     '{+2,+1, 0,+2}
  32.   };
  33.  
  34. function symbol_vector_set_t get_csextend();
  35.   return '{
  36.     '{+2, 0, 0,+2},
  37.     '{+2,+2,+1,+1},
  38.     '{+1,+2,+2,+1},
  39.     '{+1,+2,+1,+2},
  40.     '{+2, 0,+2,+1},
  41.     '{+2, 0,+1,+2},
  42.     '{+1, 0,+2,+2},
  43.     '{+2,+1, 0,+2}
  44.   };
  45. endfunction
  46.  
  47. module tb;
  48.   initial begin
  49.     symbol_vector_t my_symbol_vector;
  50.  
  51.     assert(std::randomize(my_symbol_vector) with {
  52.       my_symbol_vector inside {get_csextend()};
  53.     });  
  54.     #1000;
  55.     $finish;
  56.   end
  57. endmodule
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