Litespi issue

INFO:SoCBusHandler:main_ram added as Bus Slave.
Traceback (most recent call last):
  File "/mnt/e/Data/local_github/rtl_tinynx33u/workspace_litex/zephyr-on-litex-vexriscv/make.py", line 233, in <module>
    main()
  File "/mnt/e/Data/local_github/rtl_tinynx33u/workspace_litex/zephyr-on-litex-vexriscv/make.py", line 204, in main
    soc = SoCZephyr(board.soc_cls, **soc_kwargs)
  File "/mnt/e/Data/local_github/rtl_tinynx33u/workspace_litex/zephyr-on-litex-vexriscv/soc_zephyr.py", line 193, in SoCZephyr
    return _SoCZephyr(**kwargs)
  File "/mnt/e/Data/local_github/rtl_tinynx33u/workspace_litex/zephyr-on-litex-vexriscv/soc_zephyr.py", line 73, in __init__
    soc_cls.__init__(self,
  File "/mnt/e/Data/local_github/rtl_tinynx33u/workspace_litex/litex/litex/tools/litex_export_verilog.py", line 149, in __init__
    spiflash_module = getattr(modules, spi_flash_part)(Codes.READ_1_1_4, read_cmds=[Codes.PWRUP_RDID])
  File "/mnt/e/Data/local_github/rtl_tinynx33u/workspace_litex/litespi/litespi/spi_nor_flash_module.py", line 177, in __init__
    self._configure_chip(default_read_cmd,
  File "/mnt/e/Data/local_github/rtl_tinynx33u/workspace_litex/litespi/litespi/spi_nor_flash_module.py", line 144, in _configure_chip
    raise ValueError("""\
ValueError: Read command (SpiNorFlashOpCode(code=171, desc='Power up flash and read device ID')) not supported in chip w25q128jv!
vrangan@ASUS-STRIX-B550:/mnt/e/Data/local_github/rtl_tinynx33u$