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S-DD1 Pinout

Aug 20th, 2019
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  1. Star Ocean (J) SHVC-LN3B-01
  2.  
  3. S-DD1 Pin -- Supposed Purpose
  4.  
  5. Vcc = 5V
  6.  
  7. 001 GND
  8. 002 GND
  9. 003 Vcc
  10. 004 CARTSLOT A23
  11. 005 CARTSLOT A0 -> SRAM A0
  12. 006 CARTSLOT A22
  13. 007 CARTSLOT A1 -> SRAM A1
  14. 008 CARTSLOT A21
  15. 009 CARTSLOT A2 -> SRAM A2
  16. 010 CARTSLOT A20
  17. 011 CARTSLOT A3 -> SRAM A3
  18. 012 CARTSLOT A19
  19. 013 CARTSLOT A4 -> SRAM A4
  20. 014 CARTSLOT A18
  21. 015 CARTSLOT A5 -> SRAM A5
  22. 016 CARTSLOT A17
  23. 017 CARTSLOT A6 -> SRAM A6
  24. 018 CARTSLOT A16
  25. 019 CARTSLOT A7 -> SRAM A7
  26. 020 CARTSLOT A15
  27. 021 CARTSLOT A8 -> SRAM A8
  28. 022 CARTSLOT A14
  29. 023 CARTSLOT A9 -> SRAM A9
  30. 024 CARTSLOT A13
  31. 025 CARTSLOT A10 -> SRAM A10
  32. 026 CARTSLOT A12 -> SRAM A12
  33. 027 CARTSLOT A11 -> SRAM A11
  34. 028 GND
  35. 029 Vcc
  36. 030 2V 21.47727 MHz wave *
  37.  
  38. 031 2V DC *
  39. 032 Vcc
  40. 033 MASKROM Q15
  41. 034 MASKROM Q7
  42. 035 MASKROM Q14
  43. 036 MASKROM Q6
  44. 037 MASKROM Q11
  45. 038 MASKROM Q3
  46. 039 MASKROM Q10
  47. 040 MASKROM Q2
  48. 041 MASKROM Q13
  49. 042 MASKROM Q5
  50. 043 MASKROM Q12
  51. 044 MASKROM Q4
  52. 045 MASKROM Q9
  53. 046 MASKROM Q1
  54. 047 MASKROM Q8
  55. 048 MASKROM Q0
  56. 049 GND
  57. 050 MASKROM A0
  58.  
  59. 051 MASKROM A1
  60. 052 Vcc
  61. 053 GND
  62. 054 MASKROM A2
  63. 055 MASKROM A3
  64. 056 MASKROM A4
  65. 057 MASKROM A5
  66. 058 MASKROM A6
  67. 059 MASKROM A7
  68. 060 MASKROM A8
  69. 061 MASKROM A9
  70. 062 GND
  71. 063 MASKROM A10
  72. 064 MASKROM A11
  73. 065 MASKROM A12
  74. 066 MASKROM A13
  75. 067 MASKROM A14
  76. 068 MASKROM A15
  77. 069 MASKROM A16
  78. 070 MASKROM A17
  79. 071 GND
  80. 072 MASKROM A18
  81. 073 MASKROM A19
  82. 074 MASKROM A20
  83. 075 MASKROM P0 /CE
  84. 076 N/C **
  85. 077 MASKROM P1 /CE
  86. 078 GND
  87. 079 Vcc
  88. 080 GND
  89.  
  90. 081 GND
  91. 082 GND (Supposedly PAL/NTSC CIC)
  92. 083 SRAM /CE
  93. 084 CARTSLOT /RESET
  94. 085 CARTSLOT SYSCK
  95. 086 CARTSLOT CIC3
  96. 087 CARTSLOT CIC2
  97. 088 CARTSLOT CIC1
  98. 089 CARTSLOT CIC0
  99. 090 CARTSLOT /WR -> SRAM /WE
  100. 091 CARTSLOT /RD -> SRAM /OE
  101. 092 Vcc
  102. 093 CARTSLOT D7 -> SRAM D7
  103. 094 CARTSLOT D6 -> SRAM D6
  104. 095 CARTSLOT D5 -> SRAM D5
  105. 096 CARTSLOT D4 -> SRAM D4
  106. 097 CARTSLOT D3 -> SRAM D3
  107. 098 CARTSLOT D2 -> SRAM D2
  108. 099 CARTSLOT D1 -> SRAM D1
  109. 100 CARTSLOT D0 -> SRAM D0
  110.  
  111. * Someone more electrically inclined will have to tell me what exactly these are. These pins are connected to pin 1 of the SNES's cart slot (master clock), and through a capacitor and a couple resistors. My scope is also too low resolution to get a good reading--pin 30 shows a sinusoid ~1V pkp centered at 2V, and the line to pin 31 (which goes through an additional resistor) has a more flat reading at 2V.
  112.  
  113. ** Pin 76 is our only hope that the S-DD1 can support more than 8MB ROMs (up to 16 MB). This pin reads 0V on the Star Ocean cartridge, and is not connected to anything.
  114.  
  115. Other notes:
  116.  
  117. Star Ocean's ROM image is known to be 6MB, and it is split up on two MASKROM chips (probably 4 and 2 MB). Each chip has pins to address up to 4M x 16-bit of data. The highest address pin (A21) on both chips is not connected, so they may only support 2M x 16-bit. Both chips have A20 connected. But this means that data must be coming from all 16-bits, and the S-DD1 is responsible for selecting the high/low byte for sending to the CPU. I've confirmed that data is coming from all 16 Q lines on each MASKROM chip.
  118.  
  119. Until I get better tools, this is as good as I can do at the moment.
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