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LABB 4

Dec 16th, 2018
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  1. /*
  2. * Game.asm
  3. *
  4. * Created: 12/14/2018 5:10:02 PM
  5. * Author: amore448
  6. */
  7.  
  8. .org $2A
  9. .def zeroreg = r1
  10. .equ VMEM_SZ = 5 ; #rows on display
  11. .equ AD_CHAN_X = 6 ; ADC6=PA6, PORTA bit 6, X-led
  12. .equ AD_CHAN_Y = 7 ; ADC7=PA7, PORTA bit 7, Y-led
  13. .equ GAME_SPEED = 70 ; inter-run delay (millisecs)
  14. .equ PRESCALE = 7 ; AD_prescalar value
  15. .equ BEEP_PITCH = 5 ; Victory beep pitch
  16. .equ BEEP_LENGTH = 150 ; Victory beep length
  17.  
  18. ; --------------------------------------------------------------------
  19. ; --- Memory layout in SRAM
  20. .dseg
  21. .org SRAM_START
  22. POSX: .byte 1
  23. POSY: .byte 1
  24. TPOSX: .byte 1
  25. TPOSY: .byte 1
  26. LINE: .byte 1
  27. VMEM: .byte VMEM_SZ
  28. SEED: .byte 1
  29.  
  30. ; --------------------------------------------------------------------
  31. ; --- Macros for inc/dec-rementing
  32. ; --- a byte in SRAM
  33. .macro INCSRAM ; inc byte in SRAM
  34. lds r19,@0
  35. inc r19
  36. sts @0,r19
  37. .endmacro
  38.  
  39. .macro DECSRAM ;dec byte in SRAM
  40. lds r19,@0
  41. dec r19
  42. sts @0,r19
  43. .endmacro
  44.  
  45. ; --------------------------------------------------------------------
  46. ; --- Code
  47. //.cseg
  48. .org $00
  49. rjmp START
  50. .org INT0addr
  51. rjmp MUX
  52.  
  53. START:
  54. clr zeroreg
  55. ldi r16,HIGH(RAMEND)
  56. out SPH,r16
  57. ldi r16,LOW(RAMEND)
  58. out SPL,r16
  59. call HW_INIT
  60. call WARM
  61.  
  62. RUN:
  63. call JOYSTICK
  64. call ERASE
  65. call UPDATE
  66. call DELAY_LOOP
  67. ldi ZH,HIGH(POSX)
  68. ldi ZL,LOW(POSX)
  69. ldi r18,2
  70.  
  71. HIT:
  72.  
  73. ld r16,Z
  74. ldd r17,Z+2
  75. cp r16,r17
  76. brne NO_HIT
  77. inc ZL
  78. dec r18
  79. brne HIT
  80. ldi r18,BEEP_LENGTH
  81.  
  82. BEEP_LENGTH_LOOP:
  83. call BEEP
  84. dec r18
  85. brne BEEP_LENGTH_LOOP
  86.  
  87. HIT_END:
  88. call WARM
  89.  
  90.  
  91. NO_HIT:
  92. rjmp RUN
  93.  
  94. MUX:
  95. push r16
  96. in r16,SREG
  97. push r16
  98. push r19
  99. push ZH
  100. push ZL
  101.  
  102.  
  103. ldi ZH,HIGH(VMEM)
  104. ldi ZL,LOW(VMEM)
  105.  
  106. INCSRAM LINE
  107. lds r16,LINE
  108. cpi r16,5
  109. brne MUX_END
  110. ldi r16,0
  111. sts LINE,r16
  112.  
  113. MUX_END:
  114. out PORTB,zeroreg
  115. INCSRAM SEED
  116. out PORTA,r16
  117. add ZL,r16
  118. ld r16,Z
  119.  
  120. out PORTB,r16
  121.  
  122. pop ZL
  123. pop ZH
  124. pop r19
  125. pop r16
  126. out SREG,r16
  127. pop r16
  128. reti
  129.  
  130.  
  131.  
  132. ; --------------------------------------------------------------------
  133. ; --- Converts Analog to digital and changes position accordingly
  134. ; --- Uses: r16
  135. JOYSTICK:
  136.  
  137.  
  138.  
  139. ;-------------------------------- Convert x --------------------------------
  140. cbi ADMUX,0
  141. call AD_GET
  142. cpi r16,$03
  143. brne INCREASE_X
  144. DECSRAM POSX
  145.  
  146. INCREASE_X:
  147. cpi r16,$00
  148. brne CONVERT_Y
  149. INCSRAM POSX
  150.  
  151.  
  152.  
  153. ;-------------------------------- Convert y --------------------------------
  154. CONVERT_Y:
  155. sbi ADMUX,MUX0
  156. call AD_GET
  157. cpi r16,$03
  158. brne DECREASE_Y
  159. INCSRAM POSY
  160.  
  161. DECREASE_Y:
  162. cpi r16,$00
  163. brne JOY_LIM
  164. DECSRAM POSY
  165.  
  166. JOY_LIM:
  167. call LIMITS
  168. ret
  169.  
  170. AD_GET:
  171. /*push r17
  172. in r17,ADMUX
  173. andi r17,$f0
  174. or r17,r16
  175. out ADMUX,r17*/
  176.  
  177. sbi ADCSRA,ADSC
  178. WAIT: sbic ADCSRA,ADSC
  179. rjmp WAIT
  180. in r16,ADCH
  181. pop r17
  182. ret
  183.  
  184.  
  185. ; --------------------------------------------------------------------
  186. ; --- LIMITS Limit POSX, POSY coordinates
  187. ; --- Uses: r16,r17
  188. LIMITS:
  189. lds r16,POSX ; variable
  190. ldi r17,7 ; upper limit + 1
  191. call POS_LIM ; actual work
  192. sts POSX,r16
  193. lds r16,POSY
  194. ldi r17,5
  195. call POS_LIM
  196. sts POSY,r16
  197. ret
  198.  
  199. POS_LIM:
  200. ori r16,0 ; negative?
  201. brmi POS_LESS ; POSX neg => add 1
  202. cp r16,r17 ; past edge
  203. brne POS_OK
  204. subi r16,2
  205.  
  206. POS_LESS:
  207. inc r16
  208.  
  209. POS_OK:
  210. ret
  211.  
  212. ; --------------------------------------------------------------------
  213. ; --- UPDATE VMEM
  214. ; --- with POSX/Y, TPOSX/Y
  215. ; --- Uses: r16, r17, Z
  216. UPDATE:
  217. clr ZH
  218. ldi ZL,LOW(POSX)
  219. call SETPOS
  220. clr ZH
  221. ldi ZL,LOW(TPOSX)
  222. call SETPOS
  223. ret
  224.  
  225. ; --- SETPOS Set bit pattern of r16 into *Z
  226. ; --- Uses: r16, r17, Z
  227. ; --- 1st call Z points to POSX at entry and POSY at exit
  228. ; --- 2nd call Z points to TPOSX at entry and TPOSY at exit
  229. SETPOS:
  230. ld r17,Z+ ; r17=POSX
  231. call SETBIT ; r16=bitpattern for VMEM+POSY
  232. ld r17,Z ; r17=POSY Z to POSY
  233. ldi ZL,LOW(VMEM)
  234. add ZL,r17 ; Z=VMEM+POSY, ZL=VMEM+0..4
  235. ld r17,Z ; current line in VMEM
  236. or r17,r16 ; OR on place
  237. st Z,r17 ; put back into VMEM
  238. ret
  239.  
  240. ; --- SETBIT Set bit r17 on r16
  241. ; --- Uses: r16, r17
  242. SETBIT:
  243. ldi r16,$01 ; bit to shift
  244. SETBIT_LOOP:
  245. dec r17
  246. brmi SETBIT_END
  247. lsl r16
  248. jmp SETBIT_LOOP
  249. SETBIT_END:
  250. ret
  251.  
  252. ; --------------------------------------------------------------------
  253. ; --- Hardware init
  254. ; --- Uses: r16
  255. HW_INIT:
  256. ldi r16,$5f
  257. out DDRA,r16
  258. ldi r16,$3f
  259. out DDRB,r16
  260.  
  261. ldi r16,(1<<REFS0)|(1<<REFS1)|(0<<ADLAR)|(1<<MUX2)|(1<<MUX1)
  262. out ADMUX,r16
  263. ldi r16,(1<<ADEN)|(1<<ADPS1)
  264. out ADCSRA,r16
  265.  
  266. ldi r16,(1<<ISC01)|(1<<ISC00)
  267. out MCUCR,r16
  268. ldi r16,(1<<INT0)
  269. out GICR,r16
  270. sei
  271. ret
  272.  
  273. WARM:
  274. ldi r16,$00
  275. sts POSX,r16
  276. ldi r16,$02
  277. sts POSY,r16
  278.  
  279. push r0
  280. push r0
  281. in r16,SPH
  282. mov ZH,r16
  283. in r16,SPL
  284. inc r16
  285. mov ZL,r16
  286. call RANDOM
  287. pop r0
  288. sts TPOSY,r0
  289. pop r0
  290. sts TPOSX,r0
  291.  
  292. call ERASE
  293. ret
  294.  
  295. RANDOM:
  296. ldi r17,2
  297. lds r16,SEED
  298.  
  299.  
  300. GET_RANDOMY:
  301. swap r16
  302. mov r18,r16
  303. andi r18,$07 ; get the last 3 bits in SEED r16 <= 7
  304. cpi r18,5
  305. brmi GET_RANDOMX
  306. subi r18,4
  307. GET_RANDOMX:
  308. cpi r17,1
  309. brne RANDOM_END
  310. subi r18,-2
  311.  
  312. RANDOM_END:
  313. st Z+,r18
  314. dec r17
  315. brne GET_RANDOMY
  316. ret
  317.  
  318. ERASE:
  319. ldi ZH,HIGH(VMEM)
  320. ldi ZL,LOW(VMEM)
  321. ldi r18,5
  322.  
  323. SET_VMEM:
  324. st Z+,zeroreg
  325. dec r18
  326. brne SET_VMEM
  327.  
  328. ERASE_END:
  329. ret
  330.  
  331. ; --------------------------------------------------------------------
  332. ; --- Delay 1 ms
  333. ; --- Uses: r16, r17
  334. DELAY:
  335. ldi r16,10 ;Decimal bas
  336. delayYttreLoop:
  337. ldi r17,$1f
  338. delayInreLoop:
  339. dec r17
  340. brne delayInreLoop
  341. dec r16
  342. brne delayYttreLoop
  343. ret
  344.  
  345. ; --------------------------------------------------------------------
  346. ; --- Delay 1 ms
  347. ; --- Uses: r18
  348. DELAY_LOOP:
  349. ldi r18,GAME_SPEED
  350. DELAY_LOOPX:
  351. call DELAY
  352. dec r18
  353. brne DELAY_LOOPX
  354. ret
  355.  
  356. BEEP:
  357. sbi PORTA,3
  358. call BEEP_DELAY
  359. cbi PORTA,3
  360. call BEEP_DELAY
  361. ret
  362.  
  363. BEEP_DELAY:
  364. ldi r16,BEEP_PITCH
  365. delayYttreBeepLoop:
  366. ldi r17,$1f
  367. delayInreBeepLoop:
  368. dec r17
  369. brne delayInreBeepLoop
  370. dec r16
  371. brne delayYttreBeepLoop
  372. ret
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