patt

module patt(
    input clk, rst,
    input x,
    output reg o
);
    localparam S0 = 0, S1 = 1, S2 = 2, S3 = 3, S4 = 4;
    reg st, st_nxt;
    always @(*)
        case (st)
        S0:
            if (x) st_nxt = S1;
            else st_nxt = S0;
        S1:
            if (!x) st_nxt = S2;
            else st_nxt = S1;
        S2:
            if (x) st_nxt = S3;
            else st_nxt = S0;
        S3:
            if (x) st_nxt = S4;
            else st_nxt = S2;
        S4:
            if (x) st_nxt = S1;
            else st_nxt = S2;
        endcase
    always @(*) begin
        o = 0;
        case (st)
        S3: if (x) o = 1;
        endcase
    end
    always @(posedge clk, negedge rst)
        if (!rst) st <= S0;
        else st <= st_nxt;
endmodule


module patt_tb;
    reg clk, rst, x;
    wire o;
    patt inst(.clk(clk), .rst(rst), .x(x));
    localparam CLK_PERIOD = 100, RST_PULSE = 10, CLK_CYCLES = 5;
    initial begin
        clk = 0;
        repeat (2*CLK_CYCLES)
            #(CLK_PERIOD/2) clk=~clk;
    end
    initial begin
        rst = 0;
        #(RST_PULSE) rst = 1;
    end
    initial begin
        x=0;
        #(1*CLK_PERIOD) x=0;
        #(1*CLK_PERIOD) x=1;
        #(1*CLK_PERIOD) x=1;
    end
endmodule