Advertisement
Not a member of Pastebin yet?
Sign Up,
it unlocks many cool features!
- 8 bit CPU, 8 bit IS
- 4 regs (rA-rD)
- r1/r2 refer to registers whos address is given in op
- Assembly Bits
- set n - 0nnnnnnn - Set rA to nnnnnnn
- add/and r1 r2 - 100Ar1r2 - ADD/AND r1 to r2 and store in rD
- jmp r1 (<|=|>) - 1010rrcc - jump to ROM[rA] if rr is cc to 0
- - 1011???? - TBD
- cp r1 r2 - 1100r1r2 - copy r1 to r2
- - 1101???? - TBD
- rd/wr rd ra - 111wrdra - Read/write rd to RAM[ra]
Advertisement
Add Comment
Please, Sign In to add comment
Advertisement