module mux_structural_gate (
    input [1:0] sel_bi
    , input [3:0] data_bi
    , output q_o
);

logic [3:0] data_gated;
assign data_gated[0] = data_bi[0] & !sel_bi[0] & !sel_bi[1];
assign data_gated[1] = data_bi[1] &  sel_bi[0] & !sel_bi[1];
assign data_gated[2] = data_bi[2] & !sel_bi[0] &  sel_bi[1];
assign data_gated[3] = data_bi[3] &  sel_bi[0] &  sel_bi[1];

assign q_o = |data_gated;

endmodule