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- library ieee;
- use ieee.std_logic_1164.all;
- use IEEE.std_logic_unsigned.all;
- entity contador is port(
- clk,sentido: in std_logic;
- conta:buffer std_logic_vector(3 downto 0)
- );
- end contador;
- architecture archicontador of contador is
- begin
- process (clk)
- begin
- if(clk'event and clk='1') then
- if sentido = '1' then
- conta <= conta - 1;
- else
- conta <= conta + 1;
- end if;
- end if;
- end process;
- end archicontador;
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