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SubhamRath

write_drive.sp

SubhamRath
Sep 18th, 2020
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  1. ***** Spice Netlist for Cell 'readsrx' *****
  2.  
  3. ************** Module readsrx **************
  4. xi0 b bb wl n2 n0 srx
  5. v0 n2 gnd dc='0' ac='0'
  6. vdd n0 n2 dc='5' ac='0'
  7. vp n1 n2 dc='5' ac='0'
  8. vwl wl n2 pulse 0 5v 12ns 200ps 200ps 10ns 30ns
  9. vread read n2 pulse 0v 5v 10ns 200ps 200ps 15ns 30ns
  10. c0 gnd b 1280f
  11. m2 b gnd gnd gnd
  12. + NMOS4 l='0.4u' w='0.8u' m='127'
  13.  
  14. c1 gnd bb 1280f
  15. m3 bb gnd gnd gnd
  16. + NMOS4 l='0.4u' w='0.8u' m='127'
  17.  
  18. m4 gnd wl gnd gnd
  19. + NMOS4 l='0.4u' w='0.8u' m='254'
  20.  
  21. c2 gnd wl 2560f
  22. m8 n1 wl n1 gnd
  23. + NMOS4 l='0.4u' w='0.8u' m='254'
  24.  
  25. m1 b read n1 n1
  26. + PMOS4 l='0.4u' w='2.0u' m='1'
  27.  
  28.  
  29. m7 bb read b n1
  30. + PMOS4 l='0.4u' w='2.0u' m='1'
  31.  
  32.  
  33. m0 bb read n1 n1
  34. + PMOS4 l='0.4u' w='2.0u' m='1'
  35.  
  36.  
  37. m6 b write gnd gnd
  38. + NMOS4 l='0.4u' w='1.5u' m='1'
  39.  
  40.  
  41. m5 bb n3 gnd gnd
  42. + NMOS4 l='0.4u' w='1.5u' m='1'
  43.  
  44.  
  45. xi1 gnd n4 en b bb dout samp
  46. vpp n4 gnd dc='5' ac='0'
  47. v2 en gnd pulse 0 5v 23ns 200ps 200ps 10ns 60ns
  48. xi2 data wen write n3 n5 gnd wd
  49. vwd n5 gnd dc='5' ac='0'
  50. v1 wen gnd pulse 0 5v 41ns 200ps 200ps 17ns 60ns
  51. v3 data gnd pulse 0 5v 0ns 200ps 200ps 80ns 160ns
  52.  
  53. ************** Module samp **************
  54. .subckt samp gnd vdd en bit bitb dout example_param=1.0
  55. m0 n0 en gnd gnd
  56. + NMOS4 l='0.4u' w='1.8u' m='1'
  57.  
  58.  
  59. m1 n0 n1 dout gnd
  60. + NMOS4 l='0.4u' w='1.8u' m='1'
  61.  
  62.  
  63. m2 n1 dout n0 gnd
  64. + NMOS4 l='0.4u' w='1.8u' m='1'
  65.  
  66.  
  67. m3 vdd n1 dout vdd
  68. + PMOS4 l='0.4u' w='3.6u' m='1'
  69.  
  70. m4 n1 dout vdd vdd
  71. + PMOS4 l='0.4u' w='3.6u' m='1'
  72.  
  73. m5 bit en dout vdd
  74. + PMOS4 l='0.4u' w='4.8u' m='1'
  75.  
  76. m6 n1 en bitb vdd
  77. + PMOS4 l='0.4u' w='4.8u' m='1'
  78.  
  79. .ends samp
  80.  
  81. ************** Module srx **************
  82. .subckt srx bit bitb ws agnd avdd example_param=1.0
  83. m3 bit ws n0 agnd
  84. + NMOS4 l='0.4u' w='0.8u' m='1'
  85.  
  86. m4 n1 ws bitb agnd
  87. + NMOS4 l='0.4u' w='0.8u' m='1'
  88.  
  89. m1 agnd n1 n0 agnd
  90. + NMOS4 l='0.4u' w='1.6u' m='1'
  91.  
  92. m2 n1 n0 agnd agnd
  93. + NMOS4 l='0.4u' w='1.6u' m='1'
  94.  
  95. m6 n1 n0 avdd avdd
  96. + PMOS4 l='0.8u' w='0.6u' m='1'
  97.  
  98. m5 avdd n1 n0 avdd
  99. + PMOS4 l='0.8u' w='0.6u' m='1'
  100.  
  101. .ends srx
  102.  
  103. ************** Module wd **************
  104. .subckt wd din wen bit bitb vdd gnd example_param=1.0
  105. m1 n2 din vdd vdd
  106. + PMOS4 l='0.4u' w='1.4u' m='1'
  107.  
  108.  
  109. m2 n2 din gnd gnd
  110. + NMOS4 l='0.4u' w='0.8u' m='1'
  111.  
  112. m5 n0 din n4 gnd
  113. + NMOS4 l='0.4u' w='1.4u' m='1'
  114.  
  115.  
  116. m6 n4 wen gnd gnd
  117. + NMOS4 l='0.4u' w='1.4u' m='1'
  118.  
  119.  
  120. m3 n0 din vdd vdd
  121. + PMOS4 l='0.4u' w='1.4u' m='1'
  122.  
  123.  
  124. m4 n0 wen vdd vdd
  125. + PMOS4 l='0.4u' w='1.4u' m='1'
  126.  
  127.  
  128. m7 n1 n2 vdd vdd
  129. + PMOS4 l='0.4u' w='1.4u' m='1'
  130.  
  131.  
  132. m8 n1 wen vdd vdd
  133. + PMOS4 l='0.4u' w='1.4u' m='1'
  134.  
  135.  
  136. m9 n1 n2 n3 gnd
  137. + NMOS4 l='0.4u' w='1.4u' m='1'
  138.  
  139.  
  140. m10 n3 wen gnd gnd
  141. + NMOS4 l='0.4u' w='1.4u' m='1'
  142.  
  143.  
  144. m11 bit n0 gnd gnd
  145. + NMOS4 l='0.4u' w='0.8u' m='1'
  146.  
  147. m12 bitb n1 vdd vdd
  148. + PMOS4 l='0.4u' w='1.4u' m='1'
  149.  
  150.  
  151. m13 bitb n1 gnd gnd
  152. + NMOS4 l='0.4u' w='0.8u' m='1'
  153.  
  154. m14 bit n0 vdd vdd
  155. + PMOS4 l='0.4u' w='1.4u' m='1'
  156.  
  157.  
  158. .ends wd
  159.  
  160. **************Model File***************
  161. .MODEL NMOS4 NMOS ( LEVEL = 49
  162. +VERSION = 3.1 TNOM = 27 TOX = 7.6E-9
  163. +XJ = 1.5E-7 NCH = 1.7E17 VTH0 = 0.4964448
  164. +K1 = 0.5307769 K2 = 0.0199705 K3 = 0.2963637
  165. +K3B = 0.2012165 W0 = 2.836319E-6 NLX = 2.894802E-7
  166. +DVT0W = 0 DVT1W = 5.3E6 DVT2W = -0.032
  167. +DVT0 = 0.112017 DVT1 = 0.2453972 DVT2 = -0.171915
  168. +U0 = 444.9381976 UA = 2.921284E-10 UB = 1.773281E-18
  169. +UC = 7.067896E-11 VSAT = 1.130785E5 A0 = 1.1356246
  170. +AGS = 0.2810374 B0 = 2.844393E-7 B1 = 5E-6
  171. +KETA = -7.8181E-3 A1 = 0 A2 = 1
  172. +RDSW = 925.2701982 PRWG = -1E-3 PRWB = -1E-3
  173. +WR = 1 WINT = 7.186965E-8 LINT = 1.735515E-9
  174. +XL = -2E-8 XW = 0 DWG = -1.712973E-8
  175. +DWB = 5.851691E-9 VOFF = -0.132935 NFACTOR = 0.5710974
  176. +CIT = 0 CDSC = 8.607229E-4 CDSCD = 0
  177. +CDSCB = 0 ETA0 = 2.128321E-3 ETAB = 0
  178. +DSUB = 0.0257957 PCLM = 0.6766314 PDIBLC1 = 1
  179. +PDIBLC2 = 1.787424E-3 PDIBLCB = 0 DROUT = 0.7873539
  180. +PSCBE1 = 6.973485E9 PSCBE2 = 1.46235E-7 PVAG = 0.05
  181. +DELTA = 0.01 MOBMOD = 1 PRT = 0
  182. +UTE = -1.5 KT1 = -0.11 KT1L = 0
  183. +KT2 = 0.022 UA1 = 4.31E-9 UB1 = -7.61E-18
  184. +UC1 = -5.6E-11 AT = 3.3E4 WL = 0
  185. +WLN = 1 WW = 0 WWN = 1
  186. +WWL = 0 LL = 0 LLN = 1
  187. +LW = 0 LWN = 1 LWL = 0
  188. +CAPMOD = 2 CGDO = 1.96E-10 CGSO = 1.96E-10
  189. +CGBO = 0 CJ = 9.276962E-4 PB = 0.8157962
  190. +MJ = 0.3557696 CJSW = 3.181055E-10 PBSW = 0.6869149
  191. +MJSW = 0.1 PVTH0 = -0.0252481 PRDSW = -96.4502805
  192. +PK2 = -4.805372E-3 WKETA = -7.643187E-4 LKETA = -0.0129496 )
  193.  
  194. .MODEL PMOS4 PMOS ( LEVEL = 49
  195. +VERSION = 3.1 TNOM = 27 TOX = 7.6E-9
  196. +XJ = 1.5E-7 NCH = 1.7E17 VTH0 = -0.6636594
  197. +K1 = 0.4564781 K2 = -0.019447 K3 = 39.382919
  198. +K3B = -2.8930965 W0 = 2.655585E-6 NLX = 1.51028E-7
  199. +DVT0W = 0 DVT1W = 5.3E6 DVT2W = -0.032
  200. +DVT0 = 1.1744581 DVT1 = 0.7631128 DVT2 = -0.1035171
  201. +U0 = 151.3305606 UA = 2.061211E-10 UB = 1.823477E-18
  202. +UC = -8.97321E-12 VSAT = 9.915604E4 A0 = 1.1210053
  203. +AGS = 0.3961954 B0 = 6.493139E-7 B1 = 4.273215E-6
  204. +KETA = -9.27E-3 A1 = 0 A2 = 1
  205. +RDSW = 2.30725E3 PRWG = -1E-3 PRWB = 0
  206. +WR = 1 WINT = 5.962233E-8 LINT = 4.30928E-9
  207. +XL = -2E-8 XW = 0 DWG = -1.596201E-8
  208. +DWB = 1.378919E-8 VOFF = -0.15 NFACTOR = 2
  209. +CIT = 0 CDSC = 6.593084E-4 CDSCD = 0
  210. +CDSCB = 0 ETA0 = 0.0286461 ETAB = 0
  211. +DSUB = 0.2436027 PCLM = 4.3597508 PDIBLC1 = 7.447024E-4
  212. +PDIBLC2 = 4.256073E-3 PDIBLCB = 0 DROUT = 0.0120292
  213. +PSCBE1 = 1.347622E10 PSCBE2 = 5E-9 PVAG = 3.669793
  214. +DELTA = 0.01 MOBMOD = 1 PRT = 0
  215. +UTE = -1.5 KT1 = -0.11 KT1L = 0
  216. +KT2 = 0.022 UA1 = 4.31E-9 UB1 = -7.61E-18
  217. +UC1 = -5.6E-11 AT = 3.3E4 WL = 0
  218. +WLN = 1 WW = 0 WWN = 1
  219. +WWL = 0 LL = 0 LLN = 1
  220. +LW = 0 LWN = 1 LWL = 0
  221. +CAPMOD = 2 CGDO = 2.307E-10 CGSO = 2.307E-10
  222. +CGBO = 0 CJ = 1.420282E-3 PB = 0.99
  223. +MJ = 0.5490877 CJSW = 4.773605E-10 PBSW = 0.99
  224. +MJSW = 0.1997417 PVTH0 = 6.58707E-3 PRDSW = -93.5582228
  225. +PK2 = 1.011593E-3 WKETA = -0.0101398 LKETA = 6.027967E-3 )
  226.  
  227.  
  228.  
  229. .param hdout=6.600e-007
  230. .param hdin=7.400e-007
  231. .include '../../../SpiceModels/cmos_013_bsim4.mod'
  232. .include '../../../SpiceModels/bipolar.mod'
  233. .temp 27
  234. .param vsupply=5
  235. .global vdd gnd
  236. .nodeset V(xi0.n0)=5
  237. .options post=1 delmax=5p relv=1e-6 reli=1e-6 relmos=1e-6 method=gear
  238. .tran 1n 160n
  239. .op
  240. .save v(b) v(bb) V(xi0.n0) V(xi0.n1) v(read) v(write) v(wl) v(en) v(wen) v(data) v(dout)
  241.  
  242. .end
  243.  
  244.  
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